Data Transmission Circuit Power Reduction via Data Inversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing density and number of memory cells in semiconductor memory devices lead to longer data transmission paths, resulting in significant power consumption during data reading and writing, necessitating a solution to reduce power consumption while maintaining accuracy and cell density.
Innovation Solution
A data transmission circuit comprising a comparison circuit, correction circuit, and data conversion circuit that compares and corrects data on a global data line and data bus, inverting or transmitting data based on a preset threshold to reduce power consumption and ensure accuracy without altering the memory cell array's density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the density and number of memory cells are increased to meet market demand for storage capacity, then the storage capacity is improved, but the length of data transmission path increases resulting in significant power consumption increase
Solution Approach 1:
The patent applies preliminary action by performing data inversion before transmission based on predicted read operation outcomes. The system predicts whether read data will be inverted using comparison circuits that compare global data with bus data, and pre-inverts data when inversion is predicted, thereby reducing actual power consumption during data reading operations.
Solution Approach 2:
The patent changes the inversion parameter of data based on predicted read operations. By dynamically adjusting whether data should be inverted or not inverted according to prediction results, the system optimizes power consumption while maintaining data accuracy. This involves changing the state parameter (inverted/not inverted) based on comparison results between global and bus data.
2Use of energy by moving object
If data inversion is performed to reduce power consumption, then power consumption is reduced, but data accuracy may be compromised without proper verification
Solution Approach 1:
The patent implements feedback mechanisms through comparison circuits that continuously monitor and compare global data with bus data. The comparison results provide feedback on whether data inversion should occur, ensuring that inversion decisions are based on actual data states. This feedback loop maintains data accuracy by verifying inversion predictions against real data comparisons.
Solution Approach 2:
The system performs preliminary data inversion based on predicted read operations, then verifies the inversion through comparison circuits. By predicting the need for inversion in advance and then verifying through data comparison, the system ensures data accuracy is maintained while achieving power consumption reduction through pre-planned inversion actions.
3Quantity of substance
If the data transmission path is lengthened to accommodate more memory cells, then storage capacity increases, but transmission time and power consumption increase
Solution Approach 1:
The patent applies preliminary action by predicting read operation outcomes and pre-inverting data before actual transmission. This allows data to be prepared in advance with the correct inversion state, reducing the time needed during actual read operations and improving overall transmission efficiency while maintaining storage capacity.
Data Source
AI summary
A data transmission circuit, method and memory device are provided. A comparison circuit is configured to compare global data with bus data to output a comparison result on whether the number of different bits between the global data and the bus data exceeds a preset threshold; a correction circuit is configured to check and/or correct the global data to generate corrected data; a first data conversion circuit is configured to invert the corrected data and transmit the inverted corrected data to the data bus when exceeding the preset threshold, and transmit the corrected data to the data bus when not exceeding the preset threshold, and the first data conversion circuit is further configured to output a mark signal; and a recovery circuit is configured to transmit data or inverted data on the data bus to a serial-parallel conversion circuit according to a value of the mark signal.