Data Type Conversion Instructions for Deep Learning Efficiency

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Solution Overview

Problem

Current processors lack native support for BF16 and FP16 data types, limiting their ability to execute deep learning tasks efficiently due to precision and range constraints, and require additional power and area to support these formats.

Innovation Solution

The implementation of instructions such as VCVTNEEBF162PS and VCVTNEOBF162PS, which convert BF16 and FP16 values to FP32, allowing for execution on processors without native BF16 and FP16 support by appending trailing zeros and using rounding modes to handle denormals, enabling the execution of previously unsupported data types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If processors implement native BF16 and FP16 support, then computational efficiency and precision for deep learning tasks is improved, but device complexity and area requirements increase

Engineering Contradiction:
Improvecomputational efficiencyVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses FP32 as an intermediary format to bridge between BF16/FP16 source data and the processor's native operations. Conversion instructions transform BF16/FP16 values into FP32, allowing the processor to handle low-precision data through its existing FP32 execution units without requiring dedicated BF16/FP16 hardware, thus maintaining computational efficiency while avoiding increased device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conversion process creates a copy of the BF16/FP16 data in FP32 format, allowing the original low-precision data to be preserved while working with high-precision representations. This copying approach enables the processor to perform calculations using familiar FP32 operations without modifying the underlying hardware architecture

Inventive Principle:
Principle #26Copying

2Use of energy by moving object

If processors implement native BF16 and FP16 support, then power consumption is reduced for deep learning tasks, but manufacturing area requirements increase

Engineering Contradiction:
Improvepower consumptionVSAvoidmanufacturing area
Core Design Contradiction:
Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

The patent makes the existing FP32 execution units universal by enabling them to process converted BF16/FP16 data through software-based conversion instructions. This multi-functionality allows a single hardware implementation to handle multiple precision formats without requiring separate dedicated circuits for each format, reducing manufacturing area while maintaining energy efficiency

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The conversion instructions change the precision parameter of the data from BF16/FP16 to FP32, allowing the same hardware to operate efficiently across different precision requirements. By dynamically adjusting the data representation rather than the hardware configuration, the system reduces area requirements while adapting to different computational needs

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If conversion instructions are implemented, then compatibility with processors without native BF16/FP16 support is improved, but execution time increases due to additional conversion steps

Engineering Contradiction:
ImprovecompatibilityVSAvoidexecution time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The conversion from BF16/FP16 to FP32 is performed as a preliminary action before the main computational operations. By converting the data format in advance, the processor can then execute the actual deep learning algorithms using its native FP32 operations without repeated format conversions, minimizing the impact on overall execution time while maximizing compatibility

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230205522A1Conversion instructions
Publication Date: 2023.06.29 INTEL CORP
  • US20230205522A1 patent drawing
  • US20230205522A1 patent drawing
  • US20230205522A1 patent drawing

AI summary

Techniques for data type conversion via instruction are described. An exemplary instruction is to include fields for an opcode, an identification of a source operand, and an identification of destination operand, wherein the opcode is to indicate instruction processing circuitry is to convert odd 16-bit floating point values from the identified source operand into 32-bit floating point values and store the 32-bit floating point values in data element positions of the identified destination operand.