Datapath Circuit Power Gating by Input Transition Detection

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Solution Overview

Problem

Conventional power management techniques in integrated circuits rely on coarse-grained, system-level approaches that increase software complexity and result in suboptimal power dissipation reduction, as they fail to efficiently control power-down modes in logic circuits.

Innovation Solution

A fine-grained, bit-level power management methodology that uses a detector and controller to monitor input signal transitions and selectively disconnect or reconnect combinational logic circuits from the power supply based on detected transitions, reducing unnecessary power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If coarse-grained, system-level power management is used, then software complexity increases and power dissipation reduction becomes suboptimal, but implementation simplicity is maintained

Engineering Contradiction:
Improvepower dissipationVSAvoidsoftware complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent segments the power management control from system-level to logic-circuit level by introducing individual detectors and controllers for each logic circuit. Each detector monitors input signals and generates control signals for its associated logic circuit, enabling independent power management decisions at the circuit level rather than relying on centralized system-level control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements self-service power management where each logic circuit has its own detector that autonomously monitors its input signals and generates control signals to power down or power up the circuit based on actual usage conditions. This eliminates the need for external software-based power management and enables automatic, optimized power control at the circuit level.

Inventive Principle:
Principle #25Self-service

2Loss of energy

If coarse-grained, system-level power management is used, then implementation is simpler, but power dissipation reduction becomes suboptimal due to extended power-up duration

Engineering Contradiction:
Improvepower dissipationVSAvoidimplementation simplicity
Core Design Contradiction:
Loss of energyVSEase of operation

Solution Approach 1:

The patent divides the power management system into independent detector-controller units for each logic circuit, allowing granular control of power states. This segmentation enables precise timing of power-up and power-down events based on actual signal transitions at each circuit, rather than blanket system-level power management that keeps circuits powered longer than necessary.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The detector continuously monitors input signals and is ready to generate control signals immediately upon detecting a transition. This preliminary monitoring enables the logic circuit to be powered up exactly when needed, eliminating delays associated with system-level power management decisions and ensuring optimal power dissipation reduction.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7511535B2Fine-grained power management of synchronous and asynchronous datapath circuits
Publication Date: 2009.03.31 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US7511535B2 patent drawing
  • US7511535B2 patent drawing
  • US7511535B2 patent drawing

AI summary

A power management circuit is provided for controlling power dissipation in at least one combinational logic circuit. The power management circuit includes a detector operative to receive at least a first input signal to the combinational logic circuit and to detect a transition of the first input signal between a first logic state and a second logic state. The detector generates a control signal indicative of whether or not a transition of the first input signal has occurred. The power management circuit further includes a controller operative to receive the first control signal generated by the detector and to selectively disconnect the first combinational logic circuit from a power supply to the first combinational logic circuit when no logic transition of the first input signal is detected between a preceding computational cycle and a present computational cycle of the first combinational logic circuit, and to connect the first combinational logic circuit to the power supply when a logic transition of the first input signal is detected.