DBC Wafer Sandwich Package for Two-Sided Cooling
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Solution Overview
Problem
Existing semiconductor device packages face challenges in achieving efficient two-sided cooling, stress reduction, and thermal expansion matching, which limits their reliability and power density, especially in high-power and harsh environmental applications.
Innovation Solution
A semiconductor device package design using a double bonded copper (DBC) wafer sandwich configuration with two-sided cooling, where the top and bottom wafers have patterned conductive layers to receive semiconductor die electrodes, and a U-shaped clip for enhanced cooling, allowing for direct liquid coolant contact and thermally matched expansion coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a single-sided cooling configuration is used, then the package structure is simpler, but the thermal dissipation efficiency is insufficient for high-power applications
Solution Approach 1:
The cooling function is segmented into two independent cooling paths: one through the bottom DBC wafer and another through the top DBC wafer. This allows heat to be dissipated from both sides of the semiconductor device simultaneously, effectively doubling the thermal dissipation capacity compared to single-sided cooling configurations.
Solution Approach 2:
The cooling approach transitions from one-dimensional (single-sided) to two-dimensional (both sides) heat dissipation. By adding the top DBC wafer with its own cooling path, the system utilizes both upper and lower surfaces for thermal management, significantly improving heat removal efficiency.
2Reliability
If the semiconductor die is cooled from one side only, then the package structure is simpler, but thermal stress and expansion mismatch problems worsen
Solution Approach 1:
The thermal expansion parameters are balanced by introducing symmetric cooling from both sides. The top and bottom DBC wafers provide equal and opposite thermal compensation, reducing net thermal stress on the semiconductor die during temperature cycling and improving overall reliability.
Solution Approach 2:
The top DBC wafer acts as a thermal counterweight to the bottom DBC wafer, providing opposing thermal compensation forces that balance the thermal expansion stresses on the semiconductor die, preventing warpage and improving mechanical reliability.
3Temperature
If larger contact areas are used for cooling, then thermal resistance decreases, but the package volume increases
Solution Approach 1:
The solution transitions from increasing area in one dimension to utilizing both sides of the device for heat dissipation. By implementing two-sided cooling, the effective cooling area is doubled without proportionally increasing the package footprint or volume, maintaining compact form factor while improving thermal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved mechanical, electrical, and thermal properties, including stress reduction, increased reliability, and optimized power density, enabling high-power applications with low inductance and EMI screening, while allowing for flexible customization and cost-effective production.
Implementation Method 1
The package may also be cooled, particularly from the opposite or bottom side of the DBC wafer
Implementation Method 2
A conductive U-shaped clip can be fastened to the opposite surface of the package for enhanced cooling and can be immersed in a cooling fluid
Data Source
AI summary
Two DBC wafers have patterned first conductive surfaces which receive a semiconductor die in sandwich fashion. Lead frame terminally extending into the package interior and are connected to the die terminals. The outer conductive surfaces of each of the wafers are available for two-sided cooling of the semiconductor.