DDR Memory Internal Command Circuit for Burst Mode Power Reduction
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Solution Overview
Problem
DDR memory devices face challenges in reducing current consumption during internal command generation, particularly in burst modes BL4, BL8, and BL16, where existing solutions do not efficiently manage pulse generation and shifting, leading to higher power usage.
Innovation Solution
An internal command generation circuit comprising a burst pulse generation unit and a pulse shifting unit that receives commands for read or write operations, generating and shifting pulses to produce internal commands, thereby optimizing pulse width and reducing current consumption across different burst modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional pulse generation methods are used in DDR memory devices, then internal commands can be generated for burst modes BL4, BL8, and BL16, but current consumption increases due to unnecessary pulse generation and shifting
Solution Approach 1:
The patent applies dynamics by making the pulse generation and shifting mechanism adaptive to different burst modes (BL4, BL8, BL16). The circuit dynamically adjusts the number of pulses generated and shifting operations performed based on the selected burst mode, rather than using a fixed complex structure. This allows the system to reduce complexity and power consumption when operating in modes that require fewer pulses.
Solution Approach 2:
The patent changes the parameters of pulse generation based on the burst mode. Different burst modes require different numbers of pulses (BL4: 1 pulse, BL8: 2 pulses, BL16: 3 pulses). The circuit modifies these parameters dynamically, adjusting the pulse count and shifting operations accordingly. This parameter adaptation enables the system to optimize between functionality and power consumption for each burst mode.
2Adaptability or versatility
If burst modes BL4, BL8, and BL16 are supported with traditional pulse generation, then read and write operations can be performed, but layout area increases due to redundant circuit structures
Solution Approach 1:
The patent implements a universal pulse generation circuit that can support multiple burst modes (BL4, BL8, BL16) using a single integrated structure. Rather than having separate dedicated circuits for each burst mode, the design uses a multi-functional approach where one circuit handles all modes by adjusting operational parameters. This universality significantly reduces the overall layout area while maintaining full burst mode capability.
Solution Approach 2:
The patent merges the pulse generation and shifting functions into a unified circuit structure. Instead of implementing separate blocks for pulse generation, shifting, and mode control, the design combines these functions into an integrated system. This merging eliminates redundant interconnections and reduces the overall layout area while preserving the ability to handle different burst modes efficiently.
Data Source
AI summary
The internal command generation circuit includes a burst pulse generation unit and a pulse shifting unit. The burst pulse generation unit is configured to receive a command for a read or write operation, and generate a first burst pulse. The pulse shifting unit is configured to shift the first burst pulse and generate an internal command.