DDR3 RDIMM Self-Refresh Control via CKE Termination
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Solution Overview
Problem
DDR3 RDIMM memory devices cannot maintain self-refresh mode when the memory controller is powered off, as asserting the RESET signal takes the device out of this mode, jeopardizing data integrity.
Innovation Solution
A method and circuitry where the memory controller drives the CKE signal low and the power module powers down the CKE termination voltage, allowing the memory device to remain in self-refresh mode even when the memory controller is powered down, by maintaining the CKE termination voltage low.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the RESET signal is asserted to keep the memory device in self-refresh mode, then data integrity is maintained, but the memory device cannot remain in self-refresh mode when the memory controller is powered off
Solution Approach 1:
The memory controller performs preliminary action by driving the CKE signal low before powering down, which initiates the self-refresh mode. The power module then maintains this low state during power-down, ensuring the memory device remains in self-refresh mode without requiring the RESET signal after controller shutdown.
Solution Approach 2:
The power module acts as an intermediary by taking over the CKE signal control during power-down operations. Instead of relying on the memory controller to maintain self-refresh mode, the power module directly controls the CKE termination voltage to keep the CKE signal low, thereby maintaining self-refresh mode independently of the controller's power state.
2Use of energy by moving object
If the memory controller is powered down, then power consumption is reduced, but the memory device cannot maintain self-refresh mode and data integrity is jeopardized
Solution Approach 1:
The memory controller drives the CKE signal low before powering down, preparing the memory device for self-refresh mode. The power module then maintains this state during controller power-down, enabling the system to reduce power consumption while preserving data integrity through maintained self-refresh mode.
Solution Approach 2:
The power module serves as an intermediary that decouples the memory device from the memory controller's power state. By directly controlling the CKE termination voltage, the power module ensures the memory device can maintain self-refresh mode independently, allowing the controller to be powered down without compromising data integrity.
3Ease of operation
If the CKE termination voltage is maintained high during power-down, then the memory controller can be powered down, but the memory device exits self-refresh mode and data integrity is compromised
Solution Approach 1:
The memory controller drives the CKE signal low before initiating power-down, establishing the conditions for self-refresh mode. The power module then maintains this low state by keeping the CKE termination voltage low during power-down, enabling easy power-down operation while preserving data integrity through maintained self-refresh mode.
Solution Approach 2:
The power module acts as an intermediary that independently controls the CKE termination voltage during power-down. By maintaining the voltage low, it ensures the memory device remains in self-refresh mode even as the controller powers down, decoupling the power-down operation from data integrity loss.
Data Source
AI summary
In memory circuitry, to ensure that a memory device, such as a DDR3 RDIMM, safely operates in self-refresh mode while the memory controller is powered down and off, the memory device's clock enable (CKE) input is connected to both (i) the CKE signal applied by the memory controller and (ii) a termination voltage provided by the power module. To power down the memory controller, the memory controller drives the CKE signal low, then the power module drives the termination voltage low, then the power module powers down the memory controller. To resume normal operations, the power module powers up the memory controller, then the memory controller drives the CKE signal low, then the power module powers up the termination voltage. By holding the termination voltage low, the memory circuitry ensures that the memory device stays in self-refresh mode while the memory device is powered down and off.