Direct Digital Synthesis Circuit Harmonic Suppression
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Solution Overview
Problem
Existing RF modulator circuits face challenges in suppressing subcarrier harmonics and exhibit poor common mode rejection, leading to interference with adjacent frequency bands and variations in filtering characteristics due to manufacturing variations.
Innovation Solution
A direct digital synthesis circuit with a logical multiplier circuit and current sources is used to generate a synthesized waveform, which includes a first and second branch with resistive elements, and MOSFET logical multiplication stages to selectively increase and decrease current flows based on control signals, effectively suppressing harmonics and improving common mode rejection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a high order filter is used to suppress low order harmonics, then harmonic suppression is improved, but manufacturing precision deteriorates due to variations in filtering characteristics
Solution Approach 1:
The patent replaces the mechanical/electronic filter system with a direct digital synthesis (DDS) system that generates synthesized waveforms through digital logic circuits. This substitution eliminates the manufacturing variation issues inherent in physical filters while achieving superior harmonic suppression through digital waveform generation and selective harmonic elimination techniques
Solution Approach 2:
The patent changes the approach from passive filtering to active waveform synthesis by modifying the fundamental parameters of signal generation. By using DDS to generate synthesized waveforms with precisely controlled spectral characteristics, the system achieves harmonic suppression without relying on filter parameters that vary with manufacturing tolerances
2Object-generated harmful factors
If conventional DDS circuit is used to generate synthesized waveform, then harmonic suppression is improved, but common mode rejection deteriorates leading to poor output stability
Solution Approach 1:
The patent introduces asymmetry in the current source configuration by using complementary n-channel and p-channel MOSFET current sources with different current values (I1 and I2). This asymmetric design, combined with the logical multiplier circuit, enables both harmonic suppression and improved common mode rejection by creating differential current paths that reject common mode variations while maintaining the synthesized waveform generation capability
3Object-generated harmful factors
If high order filter is used to suppress harmonics, then harmonic suppression is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex high-order analog filter circuits with a relatively simple direct digital synthesis architecture consisting of digital logic circuits, current sources, and waveform generation elements. This substitution achieves equivalent or superior harmonic suppression with significantly reduced circuit complexity and component count
Data Source
AI summary
A direct digital synthesis circuit (108) includes a plurality of current sources (210, 211, 212), an output circuit (200), and a logical multiplier circuit (202). The output circuit (200) provides a synthesized waveform (164) output and includes a first (206) and second branch (208). The logical multiplier circuit (202) is operatively coupled to the plurality of current sources (210, 211, 212) and to the output circuit (200). The logical multiplier circuit (202) is operative to receive a plurality of signals. The logical multiplier circuit is also operative to selectively increase a first current flow through the first branch (206) by a determined magnitude and decrease a second current flow through the second branch (208) by the determined magnitude based on the plurality of signals. The synthesized waveform (164) is based on the first and second currents.