Dead-Zone Inverting Cell for High-Jitter Ring Oscillators
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing ring oscillators used in random bit generators face challenges in generating high-quality random bit streams due to low jitter-to-mean-period ratio and unbalanced duty cycles, leading to reduced entropy and synchronization issues from system clocks, which affect the unpredictability and quality of the output.
Innovation Solution
The introduction of an inverting cell with a 'dead-zone' in the switching threshold, comprising a cascade of inverters with specific connections and configurations, reduces current consumption and increases phase noise, thereby enhancing the jitter and randomness of the output bit stream.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standard CMOS ring oscillators are used, then the circuit is simple and easy to manufacture, but the jitter-to-mean-period ratio is low and the duty cycle is unbalanced
Solution Approach 1:
The ring oscillator is segmented by introducing an inverting cell that divides the oscillator into two symmetric halves. Each half contains an equal number of inverters (N/2), ensuring balanced duty cycles and symmetric signal propagation. This segmentation resolves the duty cycle unbalance issue while maintaining circuit simplicity through modular design.
Solution Approach 2:
An inverting element is introduced to create asymmetric switching behavior at the critical switching threshold. The inverting cell creates a dead-zone where the oscillator signal spends more time near the switching threshold, increasing jitter. This controlled asymmetry in the switching characteristic improves the jitter-to-mean-period ratio while the overall circuit remains symmetric.
2Use of energy by moving object
If standard ring oscillators are used, then current consumption is higher, but phase noise is lower
Solution Approach 1:
The inverting cell converts the harmful effect of high current consumption into a benefit by increasing phase noise through enhanced jitter. The asymmetric switching creates larger voltage swings and more significant timing variations, which increase phase noise but also improve randomness. The circuit accepts higher current consumption as a trade-off for generating higher quality random bits through increased jitter.
3Ease of operation
If the oscillator duty cycle is unbalanced, then the circuit operation is simpler, but the output bit stream becomes unbalanced and correlated
Solution Approach 1:
An inverting element is introduced to reverse the duty cycle of one half of the oscillator. If one half produces a duty cycle of D, the inverting element transforms it to (1-D), creating complementary duty cycles that average to 50%. This inversion ensures balanced output bits and reduces correlation while maintaining simple circuit operation through the use of a single inverting cell.
Data Source
AI summary
An inverting cell including a first inverter having first and second inputs; a second inverter having first and second inputs, wherein the second input of the second inverter is connected to the first input of the first inverter and the output of the first and second inverters is connected to the second input of the first inverter; and a third inverter connected between the output of the first and second inverters and the first input of the second inverter.