Debug Control Circuit Bypasses Powered-Down Interface Block
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Solution Overview
Problem
Integrated circuits with limited pin counts face challenges in supporting debug and test access, as existing interfaces like JTAG require multiple pins and do not allow for flexible power management, limiting debugging capabilities during the development phase.
Innovation Solution
An integrated circuit with a debug control circuit acting as a bridge between a debugger and external circuits, enabling communication bypass of the debug interface block, even when it is powered down, using a two-wire interface that reduces pin count and allows for independent power management of different domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If JTAG interface is used for debug access, then debug capability is provided, but pin count is increased
Solution Approach 1:
The debug interface is segmented into separate functional blocks: a debug interface block (DIB) for protocol handling and a debug control circuit for actual debug operations. This segmentation allows the DIB to be powered down while maintaining debug access through the control circuit, reducing the need for continuous pin usage and enabling lower pin count designs.
Solution Approach 2:
The debug control circuit acts as an intermediary between the external debugger and the DIB. It receives debug commands from the debugger and routes them to appropriate targets, enabling the system to function with fewer pins by mediating the communication between the debugger and various debug targets without requiring the DIB to remain active.
2Loss of energy
If DIB is powered down to save energy, then power consumption is reduced, but debug access is lost
Solution Approach 1:
The power state of the DIB is made dynamic rather than static. The DIB can be powered down during normal operation to save energy, but can be quickly powered up when debug access is needed. The debug control circuit manages this dynamic power state transitions, allowing the system to optimize between power consumption and debug accessibility based on operational requirements.
Solution Approach 2:
The debug control circuit is designed to initiate preliminary actions to restore debug access when needed. When a debug session is requested, the control circuit can proactively power up the DIB before actual debug operations begin, ensuring that debug access is immediately available while minimizing the time the DIB needs to be powered on, thus optimizing power consumption.
3Adaptability or versatility
If multiple external circuits are connected to debugger, then system complexity increases, but connection flexibility is reduced
Solution Approach 1:
The debug control circuit is designed with universal functionality to handle multiple different debug targets and communication protocols. It can route debug commands to various external circuits including processors, memory devices, and other components, each potentially using different protocols. This multi-functional capability allows the same control circuit to manage diverse connections without increasing overall system complexity, as it provides a unified interface for heterogeneous debug targets.
Data Source
AI summary
An integrated circuit (IC) having a bridge for interfacing a debugger and method of operating the same is provided. In one embodiment, an IC includes a debug control circuit and a debug interface block (DIB) implemented thereon. The DIB is coupled to the debug control circuit. The IC also includes an interface for a debugger and a number of interfaces for external circuits, each of the interfaces being coupled to the debug control circuit. The debug control circuit may function as a bridge for coupling an external debugger to the DIB and to external circuits coupled to the IC through corresponding ones of the interfaces. The debug control circuit may establish a connection between the debugger and one of the external circuits. Communications between the debugger and the external circuit may be conducted while bypassing the DIB.