Decimal Floating Point Unit Parallel Alignment Logic
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Solution Overview
Problem
Decimal floating point addition in IEEE 754R standard requires efficient alignment of operands, which is complex due to non-normalized coefficients and varying exponents, leading to increased operation time and adder width requirements.
Innovation Solution
Concurrent execution of three alignment cases (exponents equal, left shifting of the larger operand, and both left and right shifting) using a two-cycle adder to optimize decimal floating point addition and subtraction operations, selecting the final result based on exponent differences and leading zeros.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If decimal floating point addition uses traditional alignment methods, then correctness is maintained, but operation time increases and adder width requirements increase
Solution Approach 1:
The patent segments the alignment process into three distinct concurrent paths based on exponent relationships: Path 1 for equal exponents, Path 2 for exponent differences within leading zero range, and Path 3 for larger exponent differences. Each path has dedicated alignment logic that operates independently and simultaneously, avoiding the need for sequential processing and reducing overall operation time without increasing adder width.
Solution Approach 2:
The patent performs preliminary detection of the exponent relationship and leading zero count before the actual addition operation. By pre-determining which alignment path to use and preparing the appropriate shift amounts in advance, the system eliminates runtime decision-making delays and ensures that the correct alignment is applied immediately, reducing total operation time.
2Productivity
If decimal floating point addition processes all alignment cases sequentially, then adder width can be minimized, but average operation delay increases
Solution Approach 1:
The patent implements dynamic concurrent execution of three alignment paths, where each path is activated based on real-time detection of exponent relationships. The system dynamically selects the appropriate result from the three concurrent paths after detection, allowing the hardware to adapt to different input cases without requiring all paths to complete sequentially, thereby improving average operation speed.
Solution Approach 2:
The patent introduces an intermediary detection mechanism that determines the appropriate alignment path based on exponent differences and leading zero counts. This intermediary component acts as a mediator between the three concurrent calculation paths and the final result selection logic, enabling efficient routing of data through the appropriate path without requiring complex inter-path coordination.
Data Source
AI summary
A method for performing a decimal floating point operation including receiving a first operand having a first coefficient and a first exponent into a first register. A second operand having a second coefficient and a second exponent are received into a second register. An operation, either addition or subtraction, associated with the first operand and the second operand is received. Three concurrent calculations are performed on the first operand and the second operand. The three concurrent calculations include: applying the operation to the first operand and the second operand based on a first assumption; applying the operation to the first operand and the second operand based on a second assumption; and applying the operation to the first operand and the second operand based on a third assumption. A final result is selected from the first result, the second result and the third result.