High-Speed Decision Circuit With Precharge Branch for Faster CDR
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Solution Overview
Problem
The existing high-speed decision devices for clock and data recovery circuits have reduced operating speed due to the requirement for a certain response time to provide initial voltages on source sides of switch transistors, affecting their performance.
Innovation Solution
A high-speed decision device is designed with a first and second branch connected in parallel between VDD and a clock signal input, featuring adjusting points and an adjusting branch that includes MOS transistors to adjust the response speed of clock signal changes, forming a differential amplifier circuit to improve response time and resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a regenerative feedback circuit including switch transistors is used, then the decision device can provide initial voltages on source sides of the switch transistors, but a certain length of response time is required causing the operating speed to be reduced
Solution Approach 1:
The adjusting branch pre-charges the source sides of the switch transistors M3 and M1 to an intermediate voltage level before the clock signal transitions. This preliminary action eliminates the need for slow ramp-up of voltages during the switching event, allowing the transistors to switch states immediately when the clock signal changes, thus maintaining high operating speed while ensuring reliable initial voltage conditions.
Solution Approach 2:
The adjusting branch acts as an intermediary circuit between the power supply and the switch transistors. It provides a dedicated voltage preparation path that independently pre-charges the transistor sources to intermediate levels, decoupling the voltage preparation function from the main signal path and enabling fast switching without compromising the reliability of initial voltage provision.
2Reliability
If the response time is extended to provide initial voltages, then the switch transistors can operate reliably, but the clock and data recovery performance is degraded
Solution Approach 1:
The adjusting branch pre-charges the source sides of the switch transistors M3 and M1 to an intermediate voltage level before the clock signal transitions. This preliminary action eliminates the need for slow ramp-up of voltages during the switching event, allowing the transistors to switch states immediately when the clock signal changes, thus maintaining high operating speed while ensuring reliable initial voltage conditions.
Solution Approach 2:
The adjusting branch dynamically changes the voltage parameters at the source sides of the switch transistors by pre-charging them to intermediate levels. This parameter preparation occurs in advance and maintains optimal voltage conditions throughout operation, enabling both reliable transistor switching and high-speed clock and data recovery performance without the need for extended response times.
Data Source
AI summary
The invention relates to a high-speed decision device that comprises a first branch and a second branch that are connected in parallel between a power supply end and a clock signal input end; wherein the first branch is used for providing a normal-phase input end, and the second branch is used for providing an inverted-phase input end; a first adjusting point and a second adjusting point are arranged; and an adjusting branch is arranged between the first adjusting point and the second adjusting point, and the adjusting branch is used for adjusting the response speed when the clock signal changes. The benefit of the invention is that the response time of the circuit is further improved, the resolution of the high-speed decision device is improved, and the clock and data recovery performance of the high-speed decision device is further improved.