Deep Ion Implantation for NAND Flash Program Disturb
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Solution Overview
Problem
Program disturb remains a significant issue in non-volatile storage systems, particularly in NAND flash memory, due to the high electric field induced by boosting techniques, which causes band-to-band tunneling and gate-induced drain leakage, even as dimensions scale down.
Innovation Solution
A deep ion implantation technique is applied in selected areas of the substrate near select gates of NAND strings to increase channel capacitance, reducing boosting and thereby alleviating program disturb by controlling the electric field and minimizing gate-induced drain leakage and band-to-band tunneling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If boosting techniques are used to address program disturb, then program disturb is reduced, but high electric field effects cause gate-induced drain leakage and band-to-band tunneling
Solution Approach 1:
The patent applies different ion implantation depths in different regions of the substrate. Deep ion implantation is performed in first and second intervals adjacent to select gates, while shallow ion implantation is performed in a third interval between word lines. This creates locally differentiated channel capacitance values that control boosting in specific regions, reducing program disturb near select gates while maintaining proper operation in other areas.
Solution Approach 2:
The patent changes the physical parameter of ion implantation depth to control channel capacitance. By implanting ions deeper in the substrate in specific intervals, the channel capacitance is increased in those regions, which reduces the boosting effect and thereby reduces program disturb and harmful high electric field effects.
2Quantity of substance
If dimensions are scaled down to increase storage density, then storage capacity is improved, but program disturb worsens due to proximity of storage elements
Solution Approach 1:
The patent creates non-uniform ion implantation profiles with different depths in different spatial intervals. This local differentiation allows precise control of channel capacitance in regions where storage elements are most densely packed, enabling program disturb reduction without sacrificing storage density achieved through scaling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The deep ion implantation method effectively reduces program disturb by increasing channel capacitance, thereby minimizing the high electric field effects that lead to gate-induced drain leakage and band-to-band tunneling, enhancing the reliability of non-volatile storage systems.
Implementation Method 1
A deep ion implantation technique is applied in selected areas of the substrate near select gates of NAND strings to increase channel capacitance
Data Source
AI summary
A substrate of a non-volatile storage system includes selected regions in which additional ions are deeply implanted during the fabrication process. NAND strings are formed over the selected regions such that end word lines of the NAND strings are over the deeply implanted ions. The presence of the deeply implanted ions below the end word lines increases a channel capacitance of the substrate under the end word lines. Due to the increased capacitance, boosting of a channel in the substrate below the end word lines is reduced, thereby reducing the occurrence of gate induced drain leakage (GIDL) and band-to-band tunneling (BTBT) and, consequently, program disturb. A shallow ion implantation may also be made to set a threshold voltage of storage elements of the NAND string.