Deep Trench Isolation Masking for Narrower Pixel Trenches
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Solution Overview
Problem
The miniaturization of image sensors requires deep trench isolation (DTI) with reduced critical dimensions, which increases production costs due to the need for expensive photoresist and precise process control.
Innovation Solution
A semiconductor manufacturing method involving a three-layered dielectric structure with additional deposited layers to narrow the trench width through step-wise etching procedures, allowing for the formation of deep trench isolation with reduced dimensions at a lower cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photoresist and process control methods are used to achieve reduced trench dimension, then imaging quality is improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent segments the mask formation process into multiple deposited layers (first deposited layer, second deposited layer, third deposited layer) with different etching selectivities. Each layer is etched separately through selective etching procedures, allowing progressive refinement of the trench opening dimension without requiring expensive high-precision photoresist processes.
Solution Approach 2:
The patent changes the material parameters of the mask structure by using multiple deposited layers with different etching selectivities. This allows the critical dimension to be controlled through the thickness and selectivity parameters of each layer rather than relying solely on photoresist pattern precision, thereby reducing manufacturing cost while maintaining precision.
2Productivity
If deep trench isolation with reduced dimension is implemented, then pixel density is improved, but process complexity increases
Solution Approach 1:
The etching process is segmented into multiple selective etching steps, each removing a specific deposited layer. This segmentation allows complex dimension control to be achieved through a series of simpler, more controllable steps rather than a single complex high-precision process.
Solution Approach 2:
The deposited layers are formed in advance with predetermined thicknesses and selectivities before the etching process. This preliminary preparation of the mask structure enables the subsequent etching steps to proceed with greater ease and control, reducing the overall process complexity despite the multiple steps involved.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of more photosensitive elements per area, improving pixel density and imaging quality while reducing production costs by effectively narrowing the critical dimension of the trench.
Implementation Method 1
forming a first deposited layer which at least covers a surface of a side wall of the initial opening... formed by using a deposition gas containing C4F8 at a source power of 800-1200 W, a bias voltage of 250-400 V
Implementation Method 2
forming a second deposited layer which at least covers the side wall of the first opening and the exposed side wall of the second dielectric layer... formed by using a deposition gas containing C4F8 at a source power of 800-1200 W, a bias voltage of 250-400 V
Implementation Method 3
performing a first etching procedure with the first mask layer as a mask... removing the second dielectric layer directly below the first opening... performing a second etching procedure with the second mask layer as a mask... removing the first dielectric layer directly below the second opening... etching the substrate
Data Source
AI summary
The present application provides a method for manufacturing a semiconductor, comprising providing a substrate, on which a first, second and third dielectric layers are successively formed, the third dielectric layer having an initial opening; forming a first deposited layer which at least covers a side wall of the initial opening to form a first mask layer having a first opening; removing the second dielectric layer directly below the first opening to expose a side wall of the second dielectric layer; forming a second deposited layer which at least covers the side wall of the first opening and the exposed side wall of the second dielectric layer, to form a second mask layer having a second opening; removing the first dielectric layer directly below the second opening to expose the substrate; and removing the second mask layer, and forming a trench by etching the substrate.