Deep Trench Field Insulation in LDMOS Transistors
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Solution Overview
Problem
Lateral double diffused MOS (LDMOS) transistors in power integrated devices face a trade-off between on-resistance (Ron) and drain junction breakdown voltage, where reducing one parameter degrades the other, limiting their electrical characteristics.
Innovation Solution
The implementation of a deep trench field insulation layer with a height greater than its width in LDMOS transistors, which maintains the drift length and junction breakdown voltage similar to shallow trench field insulation structures while reducing the on-resistance by minimizing the trench field insulation layer's width, thereby improving the power integrated device's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the doping concentration of the drift region is reduced or the drift length is increased to improve the drain junction breakdown voltage, then the breakdown voltage is improved, but the on-resistance increases and current drivability is degraded
Solution Approach 1:
The patent introduces a vertical dimension by forming a deep trench field insulation layer that extends deeply into the drift region. This vertical structure allows the field insulation function to be achieved in the depth direction rather than relying solely on horizontal drift length extension, thereby maintaining breakdown voltage without increasing lateral on-resistance
Solution Approach 2:
The deep trench field insulation layer acts as an intermediary structure that terminates electric field lines vertically before they can cause breakdown. This mediator structure provides field termination without requiring increased drift length, thus resolving the contradiction between breakdown voltage and on-resistance
2Strength
If the drift length is increased to improve the drain junction breakdown voltage, then the breakdown voltage is improved, but the device area increases
Solution Approach 1:
The patent transitions from horizontal field termination (requiring long drift length) to vertical field termination (using deep trench). This dimensional change allows breakdown voltage improvement without proportional increase in lateral device area
Solution Approach 2:
The deep trench field insulation layer is nested within the drift region, utilizing the vertical space inside the device structure. This nested configuration provides field termination functionality without occupying additional lateral device area
Data Source
AI summary
A power integrated device includes a drift region disposed in a substrate, a source region disposed in the substrate spaced apart from the drift region, a drain region disposed in the drift region, a gate insulation layer and a gate electrode sequentially stacked on the substrate between the source region and the drift region, a trench isolation layer disposed in the drift region adjacent to a side of the drain region, and a deep trench field insulation layer disposed in the drift region adjacent to another side of the drain region, wherein a vertical height of the deep trench field insulation layer is greater than a width of the deep trench field insulation layer.