Deep Trench MIM Capacitor Structure for High Density, Low Leakage
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Solution Overview
Problem
Existing MIM capacitors in semiconductor substrates face challenges in achieving large capacitance values while minimizing chip area and reducing signal interference, particularly in deep trench FEOL technology.
Innovation Solution
The development of a MIM capacitor structure with a capacitor insulator structure comprising alternating dielectric layers, including amorphous tantalum oxide or tantalum-based oxide, which reduces leakage current and increases capacitance density by incorporating multiple capacitors in a deep trench configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If deep trench MIM technology is used in FEOL to achieve large capacitance values, then capacitance density is improved, but chip area requirement increases and signal interference worsens
Solution Approach 1:
The patent transitions from planar capacitor geometry to a vertical deep trench structure, utilizing the third dimension (depth) to increase capacitance density. By forming capacitor structures that extend vertically into deep trenches rather than spreading horizontally, the invention achieves higher capacitance per unit chip area, directly resolving the contradiction between capacitance density and chip area occupation.
2Quantity of substance
If deep trench MIM technology is used in FEOL to achieve large capacitance values, then capacitance density is improved, but signal interference worsens
Solution Approach 1:
The patent extracts the capacitor structures from the FEOL (front-end-of-line) deep trench environment and relocates them to the BEOL (back-end-of-line) interconnect structure. By separating the capacitor formation process from the active device fabrication region, the invention eliminates signal interference issues while maintaining high capacitance density through the vertical trench architecture.
3Reliability
If alternating dielectric layers including amorphous tantalum oxide are used, then leakage current is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent employs composite dielectric structures with alternating layers of amorphous tantalum oxide and crystalline dielectric materials. This composite approach leverages the low leakage properties of amorphous tantalum oxide while using crystalline layers to provide structural stability and process compatibility. The alternating layer structure achieves superior electrical performance without prohibitively increasing manufacturing complexity, as the layers can be deposited using standard ALD processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed MIM capacitor design achieves high capacitance density and low leakage current, with capacitance densities exceeding 2000 μF/μm², effectively utilizing a deep trench format without significant area expansion.
Implementation Method 1
a capacitor insulator structure comprising alternating dielectric layers, including amorphous tantalum oxide or tantalum-based oxide
Implementation Method 2
MIM capacitor and method of forming the same
Data Source
AI summary
A metal-insulator-metal (MIM) capacitor and methods of forming the same are described. In some embodiments, the method includes forming an opening having a first depth in one or more dielectric layers, depositing a layer in the opening and on the one or more dielectric layers, performing an anisotropic etch process to remove portions of the layer formed on horizontal surfaces, extending the opening to a second depth in the one or more dielectric layers, removing the layer, extending the opening to a third depth in the one or more dielectric layers, and forming a MIM capacitor in the opening.