Deinterleaving Device Memory Segmentation for Data Recombination

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing deinterleaver designs require significant memory and computational resources, making them costly and inefficient for high-speed data transmission, particularly due to the need for 'write by line' and 'read by column' operations which demand extensive calculations.

Innovation Solution

A method for data access in a deinterleaving device that divides memory space into segments of varying lengths, using an address pointer and time pointer to perform alternating read and write operations, shifting addresses in each cycle to simplify data recombination without requiring extra memory or intensive calculations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional 'write by line' and 'read by column' operations are used in deinterleaver, then data recombination function is achieved, but computational complexity and memory requirements increase significantly

Engineering Contradiction:
Improvedata recombination functionVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory space is divided into multiple segments, each handling specific data recombination tasks. This segmentation allows the deinterleaver to process data in organized blocks, reducing the overall computational complexity by breaking down the complex 'write by line' and 'read by column' operations into manageable segment-specific operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic address pointers and time pointers that adjust their values based on the current operation phase. These pointers dynamically navigate through memory segments, enabling flexible data access patterns that simplify the computational requirements compared to fixed traditional methods.

Inventive Principle:
Principle #15Dynamics

2Reliability

If traditional deinterleaver methods are used, then data transmission quality is improved, but memory requirements increase due to need for extra memory spaces

Engineering Contradiction:
Improvedata transmission qualityVSAvoidmemory requirements
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The memory space in this patent serves multiple functions simultaneously - it acts as both the deinterleaving buffer and the output storage. By making the memory space universal, the patent eliminates the need for separate extra memory spaces that would otherwise be required to temporarily store data during the deinterleaving process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the deinterleaving operation with the data output process. Instead of using separate memory spaces for intermediate storage and final output, the same memory space is utilized for both purposes through clever address pointer management, thereby reducing total memory requirements.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional deinterleaver design is implemented, then data recombination is achieved, but design time and operational complexity increase

Engineering Contradiction:
Improvedata recombinationVSAvoiddesign time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the addressing parameters by introducing time pointers alongside address pointers. This parameter change transforms the complex spatial addressing problem into a more manageable temporal-spatial coordination problem, simplifying both the design process and operational control of the deinterleaver.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7895402B2Method of accessing data in a deinterleaving device
Publication Date: 2011.02.22 REALTEK SEMICON CORP
  • US7895402B2 patent drawing
  • US7895402B2 patent drawing
  • US7895402B2 patent drawing

AI summary

A deinterleaving device includes a memory space, the memory space being divided into a plurality of N segments with different lengths respectively. A method of accessing data in a deinterleaving device, the method including performing the following steps during a first time cycle: reading first read data from a first address of a first segment; reading second read data from a first address of a second segment, and writing first write data into the first address of the second segment; reading third read data from a first address of a third segment, and writing second write data into the first address of the third segment; repeating the above reading and writing steps until reading Nth read data from a first address of an Nth segment, and writing N−1th write data into the first address of the Nth segment; writing Nth write data into the first address of the first segment.