Propagation Delay Balancing Circuit for TRNG Clock Randomness

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Solution Overview

Problem

The randomness of the reference clock signal in digital circuits is reduced due to process and environmental variations in the CMOS semiconductor process, causing systematic errors in ring oscillators used in true random number generators.

Innovation Solution

A propagation delay balancing method and circuit that includes a signal generating circuit with two delay chains, a path switching element, and a signal change detecting element, which cyclically switches between parallel and cross states to equalize delay signals, improving the randomness of the output by ensuring both signals pass through the same delay paths, thereby reducing mismatch caused by semiconductor process variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a ring oscillator is used in a true random number generator, then the reference clock signal can be generated, but process and environmental variations cause component mismatch which reduces the randomness of the signal

Engineering Contradiction:

Improverandomness of reference clock signalVSAvoidcomponent mismatch due to process variation

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The ring oscillator is divided into two separate delay chains (first delay chain and second delay chain), each generating delay signals independently. This segmentation allows for independent optimization and matching of the two paths, reducing the impact of process variations on the overall system randomness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs a propagation delay balancing circuit that dynamically adjusts the delay parameters of the two delay chains to ensure their delay times are substantially equal. By changing the delay parameters through controlled switching between parallel and cross states, the system compensates for process variations and maintains signal randomness.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If delay chains are used to generate delay signals, then the reference clock can be produced, but delay errors from semiconductor process variation reduce signal quality

Engineering Contradiction:

Improvereference clock signal generationVSAvoiddelay time accuracy

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

A propagation delay balancing circuit is implemented that continuously monitors and adjusts the delay times of the two delay chains. The circuit switches between parallel and cross states based on detected signal changes, creating a feedback mechanism that ensures the delay times remain substantially equal despite process variations, thereby maintaining measurement precision.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The system dynamically switches between parallel and cross states to balance the delay times of the two chains. This dynamic adjustment allows the system to adapt to process variations in real-time, ensuring that the delay time accuracy is maintained throughout operation rather than being fixed at design time.

Inventive Principle:

Principle #15Dynamics

3Ease of manufacture

If component mismatch occurs due to process variation, then manufacturing is simplified, but systematic errors are introduced that reduce randomness

Engineering Contradiction:

Improvesemiconductor fabrication simplicityVSAvoidrandomness of output signal

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

Rather than attempting to manufacture perfectly matched components, the patent accepts process variations and instead changes the operational parameters through the propagation delay balancing circuit. The circuit adjusts the effective delay parameters by switching between parallel and cross states, compensating for manufacturing mismatches and preserving signal randomness without requiring tighter manufacturing controls.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful effect of component mismatch into a beneficial feature by using the propagation delay balancing circuit to deliberately introduce controlled variations through state switching. The systematic errors from manufacturing are offset by the controlled parameter changes in operation, turning the manufacturing limitation into an opportunity for dynamic compensation.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11418177B2Propagation delay balancing circuit, method and random number generating circuit using the same

Publication Date: 2022.08.16 NUVOTON

AI summary

A propagation delay balance circuit includes a signal generating circuit, a path switching element, and a signal change detecting element. The signal generating circuit includes delay chains for outputting delay signals respectively. The path switching element has input terminals and output terminals. Each output terminal of the path switching element is electrically connected to the input terminal of each delay chain one-to-one, and input terminals of the path switching element are electrically connected one-to-one to the output terminals of the delay chains. The path switching element is controlled by the path switching controlling signal to change the one-to-one internal electrical connection between input terminals and output terminals of the path switching element. The signal change detecting element is electrically connected to the path switching element, and generates a path switching controlling signal according to delay signals of the path switching element.