Transition-Triggered Delay Cell With Near-Zero Static Power
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Solution Overview
Problem
Modern electronic architectures require delay cells that consume minimal static current and occupy minimal die surface area, as traditional RC timer delay cells are unsuitable due to high power consumption and large component sizes, while I2C delay cells consume static current during idle states.
Innovation Solution
A circuit design that includes a controllable bias current generation arm, switches for rapid capacitor charging or discharging, and a Schmitt trigger to generate output signals only when delays are needed, minimizing power consumption by disabling bias current generation during static conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional RC timer delay cells are used, then delay function is achieved, but power consumption is high and component size is large
Solution Approach 1:
The patent extracts only the essential delay function from traditional RC timer circuits by using a capacitor that charges/discharges through controlled current paths. The unnecessary resistive elements and large timing components are removed, keeping only the minimal capacitor and controlled current sources needed for delay operation.
Solution Approach 2:
The patent changes the operating parameters by using dynamically controlled current sources instead of fixed resistors. The current through the capacitor is controlled by transistor switches and bias circuits, allowing the delay time to be adjusted by changing current parameters rather than using large physical RC time constants.
2Use of energy by stationary object
If I2C delay cells are used, then delay function is achieved, but static current is consumed during idle states
Solution Approach 1:
The patent implements dynamic control of the bias current generation arm using transistor switches that are controlled by the output signal. The circuit transitions between active and idle states, dynamically enabling bias current only when delay is needed and disabling it during steady-state conditions to minimize static power consumption.
Solution Approach 2:
The patent uses periodic activation of the bias current generation arm based on signal transitions. The circuit is activated only during periods when delay is required (on signal transitions) and remains inactive during steady-state periods, creating a periodic on-off pattern that reduces average power consumption while maintaining delay functionality when needed.
3Measurement precision
If bias current generation is continuously enabled, then delay accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent prepares the capacitor and current paths in advance during idle states so that when a delay is needed, the circuit can immediately begin accurate timing. The switching transistors and current mirrors are pre-configured to ensure rapid, accurate response when activated, maintaining delay accuracy without requiring continuous power consumption.
Solution Approach 2:
The patent uses the output signal as feedback to control the enable signal for the bias current generation arm. This feedback mechanism ensures that bias current is maintained with sufficient accuracy during active delay periods while being disabled during steady-state conditions, optimizing the balance between delay accuracy and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit reduces static power consumption to nearly zero and minimizes physical size, making it suitable for advanced electronic architectures by consuming power only during signal delays and not during steady-state conditions.
Implementation Method 1
a capacitor coupled between a fifth node and a ground terminal
Data Source
AI summary
Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.