Delay Clock Circuit With Feedback Delay Measurement

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Solution Overview

Problem

Existing delay circuits in different application scenarios cannot accurately control the delay, leading to errors in data transmission due to inconsistent signal delays under varying processes and temperatures.

Innovation Solution

A delay clock circuit comprising a self-activation module, a first counter, and a count processing module, which generates a self-activation clock signal and determines the delay of the delay circuit based on a preset duration and counting results, allowing for accurate and flexible adjustment of the delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If delay is introduced through PCB routing or internal delay of transmitting/receiving nodes, then data transmission reliability is improved by aligning stable area with clock edge, but delay consistency deteriorates under different processes and temperatures

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiddelay consistency
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the delay clock circuit measures the actual delay of the delay circuit under different processes and temperatures, then feeds back this measurement information to dynamically adjust the delay amount. This closed-loop control ensures that the stable area of data is precisely aligned with the clock edge despite environmental variations, resolving the contradiction between improving reliability and maintaining delay consistency.

Inventive Principle:
Principle #23Feedback

2Device complexity

If fixed delay is used in delay circuit, then circuit complexity is reduced, but adaptability to different application scenarios deteriorates

Engineering Contradiction:
Improvecircuit complexityVSAvoidadaptability to different scenarios
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent transforms the fixed delay circuit into a dynamic adjustable delay circuit. The delay amount can be flexibly adjusted based on different application scenarios, processes, and temperature conditions through the delay clock circuit's measurement and control mechanisms. This dynamic capability maintains relatively simple circuit structure while achieving high adaptability to various scenarios.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250119128A1Delay clock circuit, signal transmission device and a method for determining delay
Publication Date: 2025.04.10 HAINING ESWIN IC DESIGN CO LTD
  • US20250119128A1 patent drawing
  • US20250119128A1 patent drawing
  • US20250119128A1 patent drawing

AI summary

The present application provides a delay clock circuit, a signal transmission device and a method for determining delay, and relates to the field of circuit technologies. The delay clock circuit includes: a self-activation module, including a first inverter and a delay circuit, and used for generating a self-activation clock signal, where the first inverter is connected to an input end of the delay circuit and an output end of the delay circuit respectively; a first counter, connected to the self-activation module, and used for starting to work under a drive of the self-activation clock signal and a start counting signal and stopping working under a drive of a stop counting signal to obtain a first counting result within a preset duration; and a count processing module, connected to the first counter, and used for obtaining a delay of the delay circuit based on the preset duration and the first counting result. The present application can perform calculations based on an accumulated delay counted by the first counter to obtain an accurate delay of the delay circuit. Therefore, an application requirement of a controllable and flexible adjustable delay of the delay circuit in different scenarios is satisfied, and stable and reliable data transmission is achieved.