Delay Measurement Using Uncorrelated Signal Transition Averaging

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Solution Overview

Problem

High precision time measurement in circuits is hindered by manufacturing tolerances in delay elements, particularly at high speeds where traditional measurement techniques struggle with timing accuracy due to the short delays approaching or below the clock cycle length.

Innovation Solution

A delay measurement apparatus using a clock, digital signal source uncorrelated with the clock, detectors, accumulators, and a calculation device to calculate the average delay time by tracking transitions through the delay unit, providing accurate measurements by averaging multiple iterations and utilizing noise to reduce correlation with the clock.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional clock cycle counting method is used to measure delay, then the measurement method is simple, but the measurement precision deteriorates when delay approaches or drops below clock cycle length

Engineering Contradiction:
Improvemeasurement method simplicityVSAvoiddelay measurement accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the delay measurement into multiple discrete transition events. By counting individual transitions of the digital signal through the delay unit and correlating them with clock cycles, the measurement is broken down into measurable discrete units rather than attempting to measure the entire delay as a single continuous value.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary digital signal with uncorrelated transitions that acts as a probe through the delay unit. This intermediary signal allows indirect measurement of delay by observing the time relationship between input and output transitions relative to clock edges, rather than directly measuring the delay itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If delay elements are reduced to minimum possible delay for high speed operation, then the circuit speed improves, but the manufacturing tolerance spread causes significant timing inaccuracies

Engineering Contradiction:
Improvecircuit operating speedVSAvoiddelay element tolerance spread
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent replaces physical mechanical adjustment of delay elements with a digital measurement and correction system. Instead of physically tuning delay elements to compensate for manufacturing variations, the system uses digital counting and calculation to measure actual delays and apply computational corrections.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the measurement parameter from absolute delay time to relative transition counting. By measuring the number of clock cycles between correlated transitions and using statistical averaging, the system converts an absolute timing measurement problem into a relative counting problem that is less sensitive to manufacturing variations.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple repeated measurements are averaged to improve precision, then the measurement accuracy improves, but the measurement time increases

Engineering Contradiction:
Improvedelay measurement accuracyVSAvoidmeasurement duration
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements continuous measurement by continuously monitoring transitions of the digital signal through the delay unit. Rather than performing discrete separate measurements, the system continuously accumulates transition data and clock cycle counts, allowing measurements to be taken without interruption and averaged in real-time.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10969430B2High precision time measurement apparatus
Publication Date: 2021.04.06 NOVELDA AS
  • US10969430B2 patent drawing
  • US10969430B2 patent drawing

AI summary

A delay measurement apparatus for measuring a delay unit comprising: a clock; clock counter; a digital signal source that is uncorrelated with the clock; a first detector arranged to detect transitions of the digital signal entering the delay unit; a first accumulator arranged to accumulate the current clock counter value based on the output of the first detector; a second detector arranged to detect transitions of the digital signal exiting the delay unit; a second accumulator arranged to accumulate the current clock counter value based on the output of the second detector; a measurement counter arranged to count the number of transitions of the digital signal passing through the delay unit; and a calculation device arranged to calculate an average number of clock cycles that elapse while a transition of the digital signal passes through the delay unit based on the first accumulator, the second accumulator and the measurement counter.