Synchronization Delimiter Detection via Error Position Analysis

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Wireless communication systems face challenges in accurately detecting synchronization delimiters due to interference, which can introduce errors in the received data, leading to incorrect identification of packet boundaries.

Innovation Solution

A method and apparatus that process candidate delimiters by comparing them to reference delimiters, considering the relative bit positions of errors to determine if a synchronization delimiter has been detected, treating adjacent errors as a single error to account for momentary interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the syncword is not encoded to protect it, then the synchronization detection remains simple and fast, but the reliability of synchronization detection deteriorates due to interference-induced errors

Engineering Contradiction:
Improvesynchronization detection reliabilityVSAvoidsynchronization detection complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of error evaluation from simple bit-count comparison to positional analysis of errors. By examining the bit positions of errors and comparing them against predetermined patterns, the system can reliably detect syncwords even with interference-induced errors, without requiring encoding of the syncword itself.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical approach of encoding the syncword with a computational approach of analyzing error positions. Instead of protecting the syncword through encoding, the system uses algorithms to evaluate the positional characteristics of errors to determine synchronization status.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If traditional error counting methods are used, then the detection process is simple, but the precision of synchronization detection deteriorates because adjacent errors are counted separately

Engineering Contradiction:
Improvesynchronization detection precisionVSAvoiderror detection complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges adjacent errors into a single error unit by analyzing their positional relationships. When errors occur at adjacent bit positions, they are combined and evaluated together against predetermined patterns, allowing the system to distinguish between multiple separate errors and clusters of errors caused by momentary interference.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the error analysis process into two stages: first identifying individual error positions, then grouping adjacent errors into error clusters. This segmentation allows precise measurement of synchronization status by considering the contextual relationship between errors rather than treating them independently.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8989330B2Method and apparatus to detect a synchronization delimiter
Publication Date: 2015.03.24 SILICON LABS CP INC
  • US8989330B2 patent drawing
  • US8989330B2 patent drawing
  • US8989330B2 patent drawing

AI summary

A technique includes receiving a datum indicative of a candidate delimiter in a receiver; and processing the datum in a machine to determine whether the datum indicates a synchronization delimiter. The processing includes comparing the candidate delimiter with a reference delimiter to identify at least one error in the candidate delimiter; and basing the determination of whether the datum indicates the synchronization delimiter at least on a bit position of of each error.