CT Delta-Sigma ADC with Body-Driven VCO for Low-Noise Linearity
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Solution Overview
Problem
Existing continuous-time delta-sigma analog-to-digital converters face challenges with low input voltage swing and reduced linearity due to quantization noise and non-linear characteristics of VCO-based quantizers, leading to degraded system performance.
Innovation Solution
A continuous-time delta-sigma analog-to-digital converter is designed with a linear integrator using current-recycling operational amplifiers and a body-driven VCO, along with a 4-tap FIR filter on the delta-sigma feedback loop to enhance noise-power efficiency, linearity, and prevent aliasing of quantization noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a VCO-based quantizer is used in a continuous-time delta-sigma ADC, then power consumption is reduced, but input voltage swing is limited and linearity is degraded due to non-linear KVCO characteristics
Solution Approach 1:
The VCO-based quantizer is segmented into multiple parallel VCOs, each handling a portion of the input signal range. This segmentation allows each VCO to operate within a smaller, more linear voltage swing while collectively covering the full input range, thereby improving linearity without increasing power consumption proportionally.
Solution Approach 2:
A feedback mechanism is introduced where the output of the VCO-based quantizer is fed back to adjust the input voltage swing of the VCOs. This feedback linearizes the overall transfer characteristic by compensating for the non-linear KVCO characteristics, maintaining high linearity while preserving low power consumption.
2Object-affected harmful factors
If a large input voltage swing is applied to the integrator, then quantization noise is reduced, but linearity is degraded due to the integrator's limited linear operating range
Solution Approach 1:
The integrator is designed with dynamic biasing that adjusts its operating point based on the input signal amplitude. When the input voltage swing is large, the integrator dynamically adapts its gain and linear operating range to accommodate the larger signal, thereby maintaining linearity while allowing large input swings to reduce quantization noise.
Solution Approach 2:
The integrator's transconductance parameter is made variable rather than fixed. By changing the transconductance parameter dynamically based on the input signal conditions, the integrator can handle large input voltage swings while maintaining its linear operating range, thus reducing quantization noise without sacrificing linearity.
3Speed
If the bandwidth of the ADC is increased, then signal processing capability is improved, but noise performance is degraded due to increased quantization noise across the broader bandwidth
Solution Approach 1:
An intermediary filtering stage is introduced between the VCO-based quantizer and the output. This intermediary filter selectively attenuates quantization noise at frequencies outside the signal bandwidth while preserving the broadband signal processing capability, thereby improving noise performance without reducing the ADC's bandwidth.
Data Source
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AI summary
Disclosed are a continuous-time delta-sigma analog-to-digital converter and an operation method thereof. More particularly, a continuous-time delta-sigma analog-to-digital converter, including: a linear integrator configured to generate a first output signal corresponding to a preset input voltage based on an operation of a linear Gm circuit that receives the preset input voltage; and a quantizer configured to generate a second output signal corresponding to the first output signal based on an operation of a body-driven VCO that receives the first output signal and to generate a digital output code corresponding to the second output signal based on an operation of a Frequency to Digital Converter (FDC) that receives the second output signal is disclosed.