Delta-Sigma ADC Feedback Delay for Simpler Noise Coupling
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Solution Overview
Problem
Existing delta-sigma ADCs with quantization noise coupling require complex implementations involving additional capacitors and phases, making them cumbersome and difficult to integrate with DACs that require two phases for processing.
Innovation Solution
A simplified delta-sigma modulator implementation where quantization is performed during the transfer phase, using a single DAC with a one-sample delay for feedback, and a charge phase that is non-overlapping with the transfer phase, allowing for a more straightforward integration with charge-transfer DACs and reducing the need for additional feedback capacitors and phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If quantization noise coupling is implemented using additional capacitors and phases, then signal-to-quantization noise ratio is improved, but device complexity increases
Solution Approach 1:
The patent merges the quantization noise coupling function with the existing two-phase charge-transfer DAC by integrating the noise coupling capacitors into the feedback path of the same DAC structure. This combines multiple functions (DAC operation and quantization noise coupling) into a single unified circuit, improving SNQR without proportionally increasing device complexity
Solution Approach 2:
The feedback capacitors in the charge-transfer DAC are made to serve dual purposes: they function as both the DAC feedback elements and the quantization noise coupling capacitors. This multi-functionality allows the same circuit components to achieve both digital-to-analog conversion and quantization error feedback, reducing the need for separate dedicated components
2Measurement precision
If quantization noise coupling is implemented with additional capacitors and phases, then signal-to-quantization noise ratio is improved, but ease of manufacture deteriorates
Solution Approach 1:
The patent combines the quantization noise coupling capacitors with the existing feedback capacitors of the charge-transfer DAC, so that the same physical capacitors serve both functions. This merging eliminates the need to manufacture separate additional capacitors and reduces the manufacturing steps required
Solution Approach 2:
The patent utilizes the existing two-phase periodic switching operation of the charge-transfer DAC to implement quantization noise coupling. The noise coupling is achieved by switching the feedback capacitors during the same two phases (charge phase and transfer phase) that the DAC already uses, without requiring additional phases or timing control circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the architecture of delta-sigma modulators while maintaining the benefits of quantization noise coupling, achieving improved signal-to-quantization noise ratio (SNQR) without significant circuit additions, and introduces only minor modifications to the signal transfer function, especially at high oversampling ratios.
Implementation Method 1
a feedback capacitor connected between the output of the quantizer and the input of the integrator
Implementation Method 2
an integrator having an input connected to receive the input signal and an output connected to the quantizer
Data Source
Figure 1(a)~1(b)
Figure 2
Figure 3
AI summary
A delta-sigma modulator has a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function, a second summing point adding an output signal from said transfer function to the input signal and subtracting a second feedback signal, a first integrator receiving an output signal from the second summing point, a quantizer receiving an output signal from the integrator and generating an output bitstream, and a digital-to-analog converter receiving the bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.