Delta-Sigma Modulator Force Correction for Flicker Noise Errors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Delta-sigma modulators face challenges in reducing flicker noise errors, particularly in high-speed applications where chopping techniques lead to quantization noise downfolding, degrading noise and spectral purity, and the force-to-zero switching introduces periodic errors that reduce the maximum stable input range.
Innovation Solution
The implementation of a force-and-correction method, where a correction signal is injected into the modulator loop after the force phase to mitigate errors, ensuring the maximum stable input range is maintained by compensating for the force error, and this method can be applied with or without chopping, using feedback correction signals to recover stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If chopping techniques are used to reduce flicker noise, then flicker noise is suppressed, but quantization noise downfolding occurs degrading spectral purity
Solution Approach 1:
The patent segments the noise handling into two distinct phases: a force phase that suppresses flicker noise by forcing the modulator state, and a correction phase that addresses quantization noise downfolding through compensation signals. This segmentation allows each phase to target specific noise types without the harmful interactions that occur when using chopping alone.
Solution Approach 2:
The patent converts the harmful effect of force-to-zero switching (which introduces periodic errors) into a beneficial force phase that actively suppresses flicker noise. By intentionally introducing the force phase and then compensating for its errors in the correction phase, the system transforms a potential harm into a useful noise suppression mechanism.
2Object-affected harmful factors
If force-to-zero switching is applied to suppress flicker noise, then flicker noise is reduced, but periodic errors are introduced reducing maximum stable input range
Solution Approach 1:
The patent applies preliminary action by implementing the force phase before the correction phase. The force phase proactively suppresses flicker noise in advance, and then the correction phase compensates for the introduced errors. This preliminary suppression followed by correction maintains both noise reduction and stable input range.
Solution Approach 2:
The patent implements feedback through the correction phase that measures the errors introduced by the force phase and feeds back compensation signals to cancel these errors. This feedback mechanism ensures that the maximum stable input range is maintained despite the periodic errors introduced during the force phase.
3Reliability
If correction signals are injected to compensate force errors, then maximum stable input range is maintained, but device complexity increases
Solution Approach 1:
The patent merges the correction functionality with the existing feedback loop of the delta-sigma modulator. The correction signals are injected through the same feedback path used for normal operation, combining multiple functions into existing circuitry rather than adding completely separate correction circuits. This reduces the overall device complexity while maintaining the maximum stable input range.
Data Source
Figure 1~3
Figure 4~5
Figure 6~7
AI summary
A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.