Delta-Sigma Modulator Force Correction for Flicker Noise Errors
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Solution Overview
Problem
Delta-sigma modulators face challenges in reducing flicker noise errors, particularly at high bandwidths, where chopping techniques introduce non-idealities like duty cycle errors and downfold quantization noise, limiting their noise robustness and spectral purity.
Innovation Solution
The implementation of a force-and-correction method, where correction signals are injected into the modulator loop to compensate for errors caused by periodic forcing, ensuring maximum stable input range and improved performance, applicable to both chopping and non-chopping configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If chopping techniques are used to reduce flicker noise, then flicker noise is suppressed, but duty cycle errors and downfolded quantization noise are introduced
Solution Approach 1:
The patent extracts and removes the harmful duty cycle errors and downfolded quantization noise components from the modulator output using a correction circuit that identifies and eliminates these specific error sources while preserving the beneficial flicker noise suppression
Solution Approach 2:
The patent implements a feedback mechanism where the modulator output is monitored for duty cycle errors and downfolded noise, and correction signals are fed back to compensate for these errors, thereby maintaining spectral purity while preserving flicker noise suppression
2Ease of operation
If periodic forcing is applied to facilitate chopper switching, then chopping operation is enabled, but force errors are injected into the modulator loop
Solution Approach 1:
The patent applies preliminary anti-action by predicting the force errors that will be injected during periodic forcing and applying compensating correction signals in advance or concurrently, thereby preventing the force errors from degrading modulator accuracy while maintaining ease of chopper switching
Solution Approach 2:
The patent introduces an intermediary correction circuit that mediates between the periodic forcing mechanism and the modulator loop, isolating the loop from force errors while allowing the forcing to continue facilitating chopper switching operation
3Speed
If feature sizes are scaled down to increase speed capability, then bandwidth is increased, but flicker noise contribution increases
Solution Approach 1:
The patent changes the spectral parameters of flicker noise through chopping techniques that modulate the noise to higher frequencies, and simultaneously applies force-and-correction to maintain accuracy, thereby allowing small feature sizes to achieve high speed while managing flicker noise through parameter transformation rather than simply increasing device dimensions
Data Source
AI summary
A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.