Delta-Sigma ADC Multi-Quantizer Loops for Smaller Feedback DACs
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Solution Overview
Problem
Existing delta-sigma analog-to-digital converter (ADC) technologies face limitations in reducing the size of feedback digital-to-analog converters (DAC) and achieving independent control over in-band and out-of-band noise, with higher bit counts leading to prohibitively large DACs and instability issues.
Innovation Solution
The proposed solution involves a delta-sigma ADC circuit with a first quantizer generating a high number of bits and a second quantizer reducing the bits applied to the feedback DAC, decoupling the number of bits in the quantizer from the feedback DAC, allowing for a smaller DAC and independent control of noise levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of bits in the quantizer is increased to improve measurement precision, then the signal-to-quantization noise ratio is improved, but the area of the feedback DAC becomes prohibitively large
Solution Approach 1:
The patent divides the single high-resolution quantization process into two stages: a first quantizer producing a high-bit output and a second quantizer producing a lower-bit output for the feedback DAC. This segmentation allows the system to achieve high measurement precision through the first quantizer while keeping the feedback DAC area manageable through the second quantizer's reduced bit width.
2Measurement precision
If the number of bits in the feedback DAC is increased to achieve higher measurement precision, then the maximum stable amplitude is improved, but the device complexity and area increase
Solution Approach 1:
The patent segments the quantization function into two separate quantizers with different bit widths. The first quantizer handles the high-precision measurement task, while the second quantizer provides a lower-resolution output to the feedback DAC, thereby maintaining maximum stable amplitude performance without increasing feedback DAC complexity.
Solution Approach 2:
The first quantizer serves multiple functions: it provides the primary high-resolution measurement output and simultaneously feeds the second quantizer which generates the feedback signal. This multi-functionality allows the system to achieve both high measurement precision and manageable feedback DAC complexity through a single high-bit quantizer stage.
3Area of stationary object
If a higher order loop is used to reduce feedback DAC area, then the feedback DAC size is reduced, but the stability of the system deteriorates
Solution Approach 1:
The patent uses segmentation to achieve feedback DAC area reduction without increasing loop order. By dividing the quantization into two stages with different bit widths, the system maintains a simple loop structure while achieving the desired area reduction, thus preserving system stability.
Data Source
AI summary
The number of bits in the quantizer can be decoupled from the number of bits in the feedback digital-to-analog converter (DAC) A delta-sigma analog-to-digital converter circuit can include a first quantizer to generate an output having a first number of bits and a second quantizer coupled to an output of the first quantizer, where the second quantizer can receive the output of the first quantizer and generate an output having a second number of bits. The feedback DAC can be coupled to the second quantizer to receive a representation of the output of the second quantizer, where the output of the feedback digital-to-analog converter circuit has the second number of bits. These techniques can reduce the area of the feedback DAC, e.g., 4 or 5 bits, and the techniques can achieve a higher maximum stable amplitude (MSA) because it is effectively a second order loop.