Delta-Sigma ADC Background Calibration for Comparator Offset Drift

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Solution Overview

Problem

Delta-sigma ADCs face performance degradation due to comparator offsets, which increase quantization noise and are difficult to calibrate without interrupting normal operation, especially in high-speed designs where foreground calibration methods are impractical.

Innovation Solution

A background calibration scheme that estimates comparator offsets by shuffling signal paths and computing mean values, allowing for offset measurement without input signals, using a shuffler to ensure equalization of comparator outputs and adjust calibration codes to minimize noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If foreground calibration methods are used to calibrate comparator offsets, then calibration accuracy is improved, but normal ADC operation is interrupted

Engineering Contradiction:
Improvecalibration accuracyVSAvoidnormal operation continuity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by performing offset calibration in the background before it affects normal operation. The calibration process continuously tracks and corrects comparator offsets during normal ADC operation, so that when foreground calibration is needed, the system has already been pre-calibrated, minimizing interruption impact.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements continuity of useful action through background calibration that operates continuously during normal ADC function. The calibration circuit monitors and adjusts comparator offsets in real-time without stopping the main conversion process, maintaining both calibration accuracy and operational continuity simultaneously.

Inventive Principle:
Principle #20Continuity of useful action

2Productivity

If background calibration is implemented to maintain continuous operation, then operational continuity is improved, but calibration precision deteriorates due to signal path shuffling

Engineering Contradiction:
Improveoperational continuityVSAvoidcalibration precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent uses an intermediary approach by introducing a shuffler circuit that randomly redirects comparator outputs to different output nodes. This intermediary mechanism allows the calibration system to measure offsets during normal operation while the shuffler ensures that the randomization doesn't corrupt the measurement accuracy through proper statistical averaging.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies feedback by continuously measuring comparator offsets during normal operation and using this information to adjust calibration codes in real-time. The background calibration system feeds back offset measurements to correctors that adjust the comparator performance, maintaining precision while operating continuously.

Inventive Principle:
Principle #23Feedback

3Device complexity

If comparator offsets are not calibrated, then device complexity is reduced, but quantization noise increases and performance degrades

Engineering Contradiction:
Improvecalibration system complexityVSAvoidquantization noise
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent implements self-service by designing a calibration system that automatically tracks and corrects its own comparator offsets without external intervention. The background calibration circuit continuously monitors offset drifts caused by aging, temperature, and voltage variations and self-corrects them, maintaining low quantization noise without adding complex external calibration equipment.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9843337B1Background flash offset calibration in continuous-time delta-sigma ADCS
Publication Date: 2017.12.12 ANALOG DEVICES INT UNLTD CO
  • US9843337B1 patent drawing
  • US9843337B1 patent drawing
  • US9843337B1 patent drawing

AI summary

Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.