Continuous-Time Delta Sigma Modulator Power Scaling by Gain Redistribution
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Solution Overview
Problem
Delta sigma modulators in electronic systems face high power consumption, which limits their autonomy and maintenance requirements, necessitating a reduction in circuit power.
Innovation Solution
The solution involves a delta sigma modulator circuit design with a forward circuit path including a first integrator stage and an ADC, and a feedback circuit path with a DAC, where the modulation clock frequency is scaled down and signal gains are distributed between the forward and feedback paths to reduce power consumption, specifically by adding a signal gain element of m to the forward path and l/m to the input path, maintaining the overall loop transfer function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the modulation clock frequency is scaled down and signal gains are distributed between forward and feedback paths, then power consumption is reduced, but the signal-to-quantization noise ratio is degraded
Solution Approach 1:
The signal gain is segmented and distributed between the forward circuit path (with gain element of m) and the feedback circuit path (with gain element of l/m). This segmentation allows the overall loop transfer function to be maintained while enabling lower operating frequencies and reduced power consumption in each individual path.
Solution Approach 2:
The modulation clock frequency is scaled down from its original value to a lower frequency (fm/m), and signal gain parameters are changed by introducing gain elements of m in the forward path and l/m in the feedback path. These parameter changes collectively reduce power consumption while attempting to maintain circuit performance.
2Use of energy by stationary object
If the modulation clock frequency is scaled down, then power consumption is reduced, but circuit performance is degraded
Solution Approach 1:
The modulation clock frequency is changed from fm to fm/m (a parameter change), and signal gain parameters are adjusted by introducing gain elements. These parameter changes are designed to reduce power consumption while maintaining the overall loop transfer function to preserve circuit performance.
3Reliability
If signal gain elements are added to the forward and input paths, then the overall loop transfer function is maintained, but device complexity increases
Solution Approach 1:
The signal gain is segmented into multiple gain elements distributed across different circuit paths. A gain element of m is placed in the forward circuit path, and a gain element of l/m is placed in the feedback circuit path. This segmentation maintains the overall loop transfer function while distributing the complexity across manageable components.
Data Source
AI summary
A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.