Delta-Sigma Receiver Circuit for Compact Sensor Electrode Processing
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Solution Overview
Problem
As input devices become more complex with increasing numbers of sensor electrodes, the processing demands increase, requiring additional area, reduced-size processing circuitry, or more time for signal processing, which is not feasible due to constraints such as higher production costs and the need for faster display updating in integrated display devices.
Innovation Solution
A processing system incorporating a delta-sigma modulator with an integrator, quantizer, feedback digital-to-analog converter, and common-mode feedback arrangement, which results in an analog front-end (AFE) of significantly smaller size than conventional AFEs, enabling efficient signal processing within limited resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional AFE circuitry is used to process signals from increasing numbers of sensor electrodes, then signal processing capability is maintained, but the area occupied by processing circuitry increases and processing time increases
Solution Approach 1:
The patent replaces conventional analog processing circuitry with a delta-sigma modulator that uses digital signal processing techniques. The modulator converts analog sensor signals to digital form using an integrator and quantizer, then processes the digital signals through a digital filter. This substitution of digital for analog processing significantly reduces the physical area required while maintaining or improving processing capability.
Solution Approach 2:
The patent changes the processing approach by transforming the signal domain from analog to digital through the delta-sigma modulation process. The integrator accumulates signal values over time, the quantizer converts continuous analog values to discrete digital levels, and the digital filter processes these discrete values. This parameter transformation enables more efficient processing with reduced hardware area.
2Productivity
If additional processing circuitry is added to handle increased sensor electrode complexity, then signal processing capability improves, but production costs increase
Solution Approach 1:
The patent replaces complex analog processing circuitry with a compact delta-sigma modulator implementation that requires fewer components. The use of digital filtering instead of analog filtering simplifies the circuit design and reduces component count, directly lowering production costs while maintaining processing capability.
Solution Approach 2:
The delta-sigma modulator serves multiple functions within a single integrated circuit block: it performs analog-to-digital conversion, signal integration, quantization, and digital filtering. This multi-functionality eliminates the need for separate processing circuits, reducing both area and production cost while handling signals from multiple sensor electrodes.
3Measurement precision
If more time is allocated for signal processing, then processing accuracy improves, but display updating speed decreases
Solution Approach 1:
The delta-sigma modulator uses periodic oversampling where the integrator accumulates signal values at a high rate over multiple periods. This periodic integration allows the system to achieve high processing accuracy by averaging out noise over time, while the digital filter subsequently processes the accumulated data efficiently to maintain fast display updating speeds.
Solution Approach 2:
The integrator continuously accumulates signal values without interruption, maintaining a steady flow of processed data. This continuous integration process ensures that signal processing accuracy improves over time while the pipeline architecture allows display updating to proceed without waiting for complete processing of each signal sequence.
Data Source
AI summary
A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.


