Delta-Sigma Converter Reset Timing for Fast Low-Power Resolution
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Solution Overview
Problem
Delta-sigma modulators and converters face challenges in achieving high resolution and fast conversion speed while maintaining low power consumption, as higher order modulators increase power consumption and cost, and existing solutions compromise between resolution and speed.
Innovation Solution
A delta-sigma modulator with an analog amplifying unit that switches between integrator and amplifier operations, using a control circuit to manage feedback coefficients and reset periods, combined with a digital filter unit for improved resolution and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If higher order delta-sigma modulators are used to achieve high resolution, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic switching between integrator and amplifier operations in the analog amplifying unit. The feedback coefficient is dynamically adjusted: during the integration period (from reset to predetermined time), the primary feedback coefficient is 1 for integrator operation; after the predetermined time elapses, the primary feedback coefficient becomes greater than 1 for amplifier operation. This dynamic adaptation allows the system to achieve high resolution equivalent to higher-order modulators while maintaining lower power consumption.
2Measurement precision
If higher order delta-sigma modulators are used to achieve high resolution, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent changes the operational parameters of the analog amplifying unit by dynamically adjusting the feedback coefficient. The control circuit switches the primary feedback coefficient between 1 (integrator mode) and greater than 1 (amplifier mode) based on the timing relative to the reset operation. This parameter change enables the system to achieve high-resolution conversion without requiring a higher-order modulator structure, thereby reducing device complexity.
3Productivity
If faster conversion speed is achieved, then productivity is improved, but power consumption increases
Solution Approach 1:
The patent employs periodic reset operations at predetermined intervals to clear the integration capacitor and prepare for the next conversion cycle. Between resets, the system operates in integrator mode for a predetermined period, then switches to amplifier mode. This periodic action structure enables fast conversion speed by efficiently utilizing the integration period while controlling power consumption through the subsequent amplifier phase, avoiding continuous high-power operation.
Data Source
AI summary
A delta-sigma modulator and a delta-sigma converter include an analog amplifying unit to amplify an analog signal and having at least a primary feedback coefficient, a quantizer to quantize an output signal of the analog amplifying unit, a DA converter to perform DA conversion on output of the quantizer and output a feedback signal, an adder-subtractor to input into the analog amplifying unit an analog signal obtained by subtracting the feedback signal from an analog signal input therein, a reset circuit to reset the analog amplifying unit at predetermined periods, and a control circuit to control the analog amplifying unit so that the analog amplifying unit operates as an integrator with the primary feedback coefficient of 1 until a predetermined period elapses after the reset circuit resets the analog amplifying unit and as an amplifier with the primary feedback coefficient of greater than one after the predetermined period has elapsed.