Digital Delta-Sigma Modulator with Non-Recursive Residue Pipelining

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Solution Overview

Problem

Current delta-sigma digital-to-analog converters (DACs) are limited by their recursive implementation, which restricts output data rate and performance, introducing spectral artifacts and degrading signal quality when attempting to increase output rate through parallelization or pipelining.

Innovation Solution

A digital delta-sigma modulator with non-recursive computation of residues, utilizing an input port, residue calculation circuit, and output calculation circuit to generate outputs at higher sample rates through parallelization and pipelining, bypassing the limitations of recursive logic.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If recursive implementation is used in delta-sigma DAC, then device complexity is reduced and ease of manufacture is improved, but output data rate is limited and productivity deteriorates

Engineering Contradiction:
Improveease of manufactureVSAvoidoutput data rate
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent segments the residue computation into independent non-recursive calculations that can be parallelized. Instead of a single recursive computation chain, the system divides the output data generation into multiple independent residue calculations that can be performed simultaneously, enabling higher output data rates while maintaining manufacturing simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimensional recursive computation approach to a multi-dimensional parallel computation architecture. By implementing non-recursive residue computations that can be executed in parallel across multiple dimensions, the system achieves higher productivity without proportionally increasing device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If output sample rate is increased in recursive delta-sigma DAC, then bandwidth and dynamic range are improved, but spectral artifacts are introduced and signal quality deteriorates

Engineering Contradiction:
Improveoutput sample rateVSAvoidspectral artifacts
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent inverts the traditional recursive approach by using non-recursive residue computations. This fundamental reversal eliminates the feedback loop that causes spectral artifacts in recursive implementations, allowing high output sample rates to be achieved without introducing harmful spectral artifacts or degrading signal quality.

Inventive Principle:
Principle #13The other way round (Inversion)

3Productivity

If parallelization is attempted in recursive delta-sigma DAC to increase output rate, then productivity is improved, but device complexity increases and manufacturing difficulty worsens

Engineering Contradiction:
Improveoutput rateVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the computation into independent non-recursive residue calculations that naturally lend themselves to parallelization. Each segment can be computed independently without requiring complex synchronization or feedback mechanisms, allowing straightforward parallel implementation that increases productivity without proportionally increasing device complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10848176B1Digital delta-sigma modulator with non-recursive computation of residues
Publication Date: 2020.11.24 RAYTHEON CO
  • US10848176B1 patent drawing
  • US10848176B1 patent drawing
  • US10848176B1 patent drawing

AI summary

A delta-sigma modulator (DSM) with non-recursive computation of delta-sigma residues comprising: an input port for receiving a digital input signal; a residue calculation circuit coupled to the input port for calculating delta-sigma residues non-recursively; and a DSM output calculation circuit coupled to the output of the residue calculation circuit for generating an output of the DSM.