Capacitively Coupled Delta-Sigma Modulator With Ripple-Matched Feedback

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Solution Overview

Problem

Capacitively coupled continuous-time delta-sigma modulators face noise peaking and stability issues due to quantization noise demodulation, which increases the noise floor and reduces stability, especially when using a ripple reduction loop to mitigate ripple generation during modulation operations.

Innovation Solution

A capacitively coupled continuous-time delta-sigma modulator design that includes an instrumentation amplifier, a delta-sigma modulator, and a ripple reduction loop unit, where the ripple reduction loop removes ripple from the output voltage and feeds the demodulation voltage back to the instrumentation amplifier, operating at the same frequency as the sampling frequency to prevent noise peaking and maintain signal-to-noise ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a ripple reduction loop is used to remove ripple from the output voltage, then the ripple is reduced, but noise peaking occurs in the noise transfer function and stability is reduced

Engineering Contradiction:
ImproverippleVSAvoidstability
Core Design Contradiction:
Object-generated harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent implements a ripple reduction loop that feeds back a demodulation voltage to the instrumentation amplifier. This feedback mechanism selectively removes ripple components at the modulation frequency while maintaining stability by operating at the same frequency as the sampling frequency, preventing noise peaking in the noise transfer function.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the operating frequency parameter of the ripple reduction loop to match the sampling frequency. This parameter alignment ensures that the demodulation voltage effectively cancels ripple without causing noise peaking or stability issues, resolving the contradiction between ripple reduction and stability maintenance.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If a ripple reduction loop is used to remove ripple from the output voltage, then the ripple is reduced, but the noise floor increases due to quantization noise demodulation

Engineering Contradiction:
ImproverippleVSAvoidnoise floor
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The ripple reduction loop uses feedback to selectively target and remove only the ripple components at the modulation frequency. By operating at the same frequency as the sampling frequency, the loop prevents quantization noise demodulation from increasing the noise floor, as the feedback mechanism is frequency-selective and does not affect the quantization noise spectrum.

Inventive Principle:
Principle #23Feedback

3Object-generated harmful factors

If the RRL operating frequency is different from the sampling frequency, then ripple removal may be more effective, but noise peaking occurs and signal-to-noise ratio is damaged

Engineering Contradiction:
ImproverippleVSAvoidsignal-to-noise ratio
Core Design Contradiction:
Object-generated harmful factorsVSMeasurement precision

Solution Approach 1:

The patent sets the RRL operating frequency parameter equal to the sampling frequency. This parameter alignment ensures that the demodulation voltage effectively removes ripple while preventing noise peaking. The frequency matching ensures that the ripple reduction loop operates in harmony with the sampling process, maintaining the signal-to-quantization noise ratio.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11025269B2Capacitively coupled continuous-time delta-sigma modulator and operation method thereof
Publication Date: 2021.06.01 KOREA UNIV RES & BUSINESS FOUND
  • US11025269B2 patent drawing
  • US11025269B2 patent drawing
  • US11025269B2 patent drawing

AI summary

According to an exemplary embodiment, a capacitively coupled continuous-time delta-sigma modulator includes an instrumentation amplifier amplifying an input voltage to an output voltage of a predetermined magnitude, a delta-sigma modulator outputting a bit signal quantized depending on a sampling frequency based on the output voltage and to convert the bit signal into a digital-to-analog conversion voltage, and a ripple reduction loop unit generating a demodulation voltage, in which a ripple is removed from the output voltage, depending on an RRL operating frequency to feed the demodulation voltage back to the instrumentation amplifier. The RRL operating frequency is equal to the sampling frequency.