Depleted SCR Steering Diode for Low Capacitance TVS
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Solution Overview
Problem
Current transient voltage suppressor (TVS) devices face challenges in reducing capacitance while maintaining a simplified and low-cost manufacturing process, and in miniaturizing the area occupied by the chips, especially in integrating steering diodes with Zener diodes for effective over-voltage protection in integrated circuits.
Innovation Solution
The integration of high-side and low-side diodes with a main Zener diode as vertical diodes in a semiconductor substrate, utilizing a semiconductor controlled rectifier (SCR) structure with multiple PN junctions connected in series, and a depleted SCR configuration to reduce capacitance and area occupancy, along with insulation trenches to isolate diodes and prevent parasitic thyristor activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If steering diodes are integrated with Zener diode to reduce area, then area occupancy is reduced, but capacitance increases
Solution Approach 1:
The patent transitions from lateral integration of steering diodes with Zener diode to vertical stacking configuration. The SCR is formed vertically with P-type and N-type doped regions stacked along the vertical axis, allowing the high-side steering diode function to be integrated without increasing lateral area. This vertical dimensionality change enables area reduction while maintaining low capacitance through the series connection of multiple PN junctions in the vertical stack.
2Reliability
If conventional diode array is used for ESD protection, then protection function is achieved, but capacitance and area occupancy are high
Solution Approach 1:
The patent merges the high-side steering diode function with the Zener diode by forming an SCR structure where the P-type doped region and N-type doped region are integrated with the Zener diode's doped regions. This consolidation eliminates the need for separate lateral integration of steering diodes, reducing area occupancy while maintaining the ESD protection function through the unified vertical structure.
3Quantity of substance
If multiple PN junctions are stacked in series to reduce capacitance, then capacitance is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent employs parameter changes in the doping profiles to simplify manufacturing. By optimizing the doping concentrations and depth profiles of the P-type and N-type regions during standard semiconductor fabrication, the multiple PN junctions in the vertical SCR stack are formed with controlled capacitance characteristics. This parameter optimization allows series-connected junctions to achieve low capacitance without requiring complex additional manufacturing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces capacitance and area occupancy, ensuring effective transient voltage suppression with uniform doping profiles and controlled device performance, while maintaining a simplified manufacturing process and minimizing the risk of parasitic transistor activation.
Implementation Method 1
The equivalent capacitances formed by the PN junctions of the SCR are connected in series, significantly reducing the total capacitance
Implementation Method 2
The N- top dopant layer portion of the SCR is floating and completely depleted at a zero bias, causing the SCR to function like a normal diode with low capacitance
Implementation Method 3
The Zener diode has a large size to function as an avalanche diode from the high voltage terminal, i.e., terminal Vcc, to the ground voltage terminal, i.e., terminal Gnd
Implementation Method 4
When a positive voltage strikes on one of the I/O (input/output) terminal, the high side diodes provide a forward bias and are clamped by the large Vcc-Gnd diodes
Data Source
AI summary
A transient-voltage suppressing (TVS) device disposed on a semiconductor substrate of a first conductivity type. The TVS includes a buried dopant region of a second conductivity type disposed and encompassed in an epitaxial layer of the first conductivity type wherein the buried dopant region extends laterally and has an extended bottom junction area interfacing with the underlying portion of the epitaxial layer thus constituting a Zener diode for the TVS device. The TVS device further includes a region above the buried dopant region further comprising a top dopant layer of a second conductivity type and a top contact region of a second conductivity type which act in combination with the epitaxial layer and the buried dopant region to form a plurality of interfacing PN junctions constituting a SCR acting as a steering diode to function with the Zener diode for suppressing a transient voltage.