Deskew Delay Circuit Using Current Splitting for Timing Linearity
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Solution Overview
Problem
Existing test systems face challenges in synchronizing timing signals to device under test (DUT) due to differences in signal propagation paths, leading to timing errors known as 'skew', especially near decision threshold regions and at the midscale of available delay code inputs.
Innovation Solution
A deskew system with multiple delay cells, including a first cell configured to provide maximum, minimum, or intermediate delay based on user-specified delay adjust codes, and a current splitter to apportion currents through early, mid, and late signal paths, allowing for precise control of signal delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple delay cells with current splitters are used to provide programmable delay, then timing precision and edge placement accuracy are improved, but device complexity increases
Solution Approach 1:
The delay circuit is divided into multiple delay cells (first delay cell, second delay cell, etc.) that can be independently controlled. Each delay cell contains switching circuits that can be selectively activated based on the desired delay amount, allowing precise timing control through modular segmentation of the overall delay function.
Solution Approach 2:
The delay circuit employs dynamically switchable current paths through the use of switching circuits controlled by delay adjust codes. The circuit can dynamically reconfigure which current paths are active (first current path, second current path, third current path) to achieve different delay amounts, providing adaptability and precision without requiring a fixed complex structure for all possible delay values.
2Measurement precision
If manually adjustable potentiometers are used for deskewing, then timing alignment can be achieved, but ease of operation deteriorates due to manual adjustment requirements
Solution Approach 1:
The delay circuit automatically adjusts timing alignment through programmable control. Instead of requiring manual potentiometer adjustment, the system uses delay adjust codes that automatically configure the switching circuits and current paths to achieve the desired delay, making the system self-adjusting and eliminating manual intervention.
Solution Approach 2:
The mechanical potentiometer adjustment system is replaced with an electronic programmable control system. The manual mechanical adjustment of potentiometers is substituted with digital or electronic delay adjust codes that control switching circuits, transforming a mechanical adjustment process into an electronic programming process that is more precise and easier to operate.
3Adaptability or versatility
If coarse and fine delay stages are used, then programmable delay can be achieved, but manufacturing precision deteriorates due to non-linearity near decision thresholds
Solution Approach 1:
Different current paths are designed with different characteristics to address local non-linearity issues. The first current path, second current path, and third current path can have different delay characteristics, allowing the circuit to compensate for non-linearity in specific regions of the delay range by selectively activating appropriate paths based on the delay adjust code.
Solution Approach 2:
The circuit changes operational parameters by switching between different current paths and activating different switching circuits based on the delay adjust code. This dynamic parameter change allows the system to maintain linear delay characteristics across the full range by selecting appropriate operating modes for different delay regions, avoiding the non-linearity problems associated with fixed threshold-based delay circuits.
Data Source
AI summary
This disclosure is in the field of electronics and more specifically in the field of timing control electronics. In an example, a timing control system can include or use an array of circuit cells, and each cell can provide a signal delay using a fixed delay or interpolation. The interpolation can include, in one or more cells, using three timing signals with substantially different delays to create a delayed output signal. Linearity of the delayed output signal is thereby improved. In an example, an impedance transformation circuit can be applied to improve a bandwidth in one or more of the cells to thereby improve the bandwidth of the timing control system.


