Imaging Detector Pixel Isolation and Decoupling
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Solution Overview
Problem
Current CT scanner detector arrays face noise contamination and crosstalk issues due to analog and digital readout electronics being in the same substrate, affecting detector linearity, gain, and noise performance, especially at low doses, and existing decoupling solutions increase footprint and cost.
Innovation Solution
The implementation of individual analog readout channel wells electrically isolates analog components within each well from others, and decoupling circuitry is integrated into the metal layers of the ASIC, providing isolation without additional space or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If analog and digital readout electronics are placed in the same substrate, then device complexity is reduced and manufacturing is simplified, but noise contamination and crosstalk increase, degrading detector linearity, gain, and noise performance
Solution Approach 1:
The substrate is segmented into multiple isolated wells, with each well containing either analog or digital readout electronics. This physical segmentation through isolation structures (such as deep trench isolation or separate well regions) prevents noise coupling between analog and digital circuits while maintaining a single integrated substrate, thus resolving the contradiction between device simplicity and noise performance
Solution Approach 2:
Analog readout electronics are extracted from the digital substrate region and placed in separate isolated wells or dedicated analog regions. This extraction of analog components from the noisy digital environment eliminates crosstalk and noise contamination while still using the same overall substrate, achieving both manufacturing simplicity and improved signal quality
2Measurement precision
If decoupling circuitry is added to isolate analog channels, then noise performance and detector linearity improve, but device footprint and manufacturing cost increase
Solution Approach 1:
Decoupling circuitry is merged with the readout electronics and integrated into the same ASIC substrate. The decoupling capacitors and isolation structures are combined with the analog readout channels in a unified design, eliminating the need for separate external decoupling components. This integration achieves noise isolation and improved detector linearity without increasing the overall device footprint or manufacturing complexity
3Reliability
If external decoupling circuitry is used to isolate power supplies, then analog channel isolation improves, but additional space and inductance are introduced
Solution Approach 1:
The ASIC performs its own decoupling function through integrated capacitors and isolation structures built into the same substrate. Each analog readout channel includes self-contained decoupling elements that eliminate the need for external decoupling circuitry. This self-service approach provides effective analog channel isolation while reducing overall device complexity and eliminating additional inductance from external interconnections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves detector linearity, gain, and noise performance while enabling low-dose imaging by isolating analog components and integrating decoupling within the ASIC, reducing crosstalk and noise contamination.
Implementation Method 1
decoupling circuitry is integrated into the metal layers of the ASIC, providing isolation without additional space or cost
Implementation Method 2
a two-dimensional (2D) back-illuminated photodiode array of detector pixels... detects radiation that traverses the examination region, and generates a signal indicative thereof
Implementation Method 3
Each detector tile includes a scintillator layer optically coupled to a two-dimensional (2D) back-illuminated photodiode array
Data Source
AI summary
An imaging apparatus (400) includes a detector array (412) with at least one detector tile (418). The detector tile includes a photosensor array (422) with a two dimensional array of individual photosensitive detector pixels (424) located within a non-photosensitive area (426) and readout electronics (432) coupled to the photosensor array. The readout electronics includes individual analog readout channel wells (602, 604) corresponding to the individual detector pixels, wherein an analog readout channel well electrically isolates analog electrical components therein from analog electrical components in other analog readout channel wells. Decoupling circuitry optionally is located in at least one of metal layers of the individual analog readout channels or in the individual analog readout channel wells.


