Deuterated Charge-Trap Memory Layer for Leakage Reduction
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Solution Overview
Problem
Conventional non-volatile semiconductor memory devices, such as SONOS transistors, face poor data retention due to leakage current through the nitride or oxy-nitride layer, leading to limited device lifetime and performance issues.
Innovation Solution
Incorporating a multi-layer charge-trapping region with a deuterated layer between the tunnel dielectric and charge-trapping layer, and optionally another deuterated layer between the charge-trapping layer and the top dielectric, to mitigate hot electron degradation and improve data retention by reducing voltage shifts during programming and erase cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional nitride or oxy-nitride layer is used as the charge-trapping layer, then the device can store charge, but leakage current through the layer causes poor data retention and limited device lifetime
Solution Approach 1:
The charge-trapping layer is divided into multiple sub-layers with different compositions and functions. The first charge-trapping sub-layer (silicon-rich nitride) is optimized for charge storage, while the second charge-trapping sub-layer (oxygen-rich nitride) is optimized for reducing leakage current. This segmentation allows each sub-layer to specialize in one function, resolving the contradiction between charge storage capability and leakage reduction.
Solution Approach 2:
Different regions of the charge-trapping layer are given different local properties. The first sub-layer has high trap density for charge storage, while the second sub-layer has lower trap density but better barrier properties against leakage. This local differentiation of properties enables simultaneous optimization of charge storage and leakage prevention that cannot be achieved with a uniform layer.
2Measurement precision
If silicon-rich SONOS layers are used, then a large initial separation between program and erase voltages is achieved, but charge storing ability deteriorates rapidly
Solution Approach 1:
The charge-trapping functionality is segmented into two sub-layers: the first sub-layer provides strong voltage separation characteristics typical of silicon-rich nitride, while the second sub-layer provides stable charge storage over time. This segmentation resolves the contradiction by distributing different performance characteristics to different layers rather than requiring a single layer to optimize both simultaneously.
3Duration of action of stationary object
If oxygen-rich layers are used, then the rate of deterioration of charge storing ability is reduced, but the initial separation between program and erase voltages is reduced
Solution Approach 1:
The charge-trapping layer is segmented so that the first sub-layer (silicon-rich) provides the necessary voltage separation, while the second sub-layer (oxygen-rich) provides stable charge storage with slow deterioration. This segmentation allows the device to achieve both good initial voltage separation and sustained charge storage capability over time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances programming and erase speed while increasing data retention and extending the useful lifetime of the memory device by reducing leakage current and maintaining a suitable barrier to charge leakage.
Implementation Method 1
mitigate hot electron degradation and improve data retention by reducing voltage shifts during programming and erase cycles
Data Source
AI summary
A memory is described. Generally, the memory includes a number of non-planar multigate transistors, each including a channel of semiconducting material overlying a surface of a substrate and electrically connecting a source and a drain, a tunnel dielectric layer overlying the channel on at least three sides thereof, and a multi-layer charge-trapping region overlying the tunnel dielectric layer. In one embodiment, the multi-layer charge-trapping region includes a first deuterated layer overlying the tunnel dielectric layer and a first nitride-containing layer overlying the first deuterated layer. Other embodiments are also described.