DFE Buffer Reset Suppression for Memory Write Throughput
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Solution Overview
Problem
Decision Feedback Equalizers (DFEs) in memory devices face challenges in resetting their buffers between closely spaced write operations, leading to inaccurate data interpretation due to incomplete reset cycles.
Innovation Solution
The implementation of reset circuitry and suppression circuitry in memory devices to selectively reset or suppress the reset of DFE buffers based on the duration between write operations, ensuring accurate data interpretation by utilizing available DQS cycles for buffer initialization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If write operations are closely spaced in time, then productivity increases, but the DFE buffer cannot be fully reset between operations leading to measurement precision degradation
Solution Approach 1:
The patent applies partial reset action by selectively resetting only the necessary portion of the DFE buffer based on the timing between write operations. When operations are closely spaced, a full reset is suppressed and only partial resetting is performed, allowing the system to maintain productivity while performing the minimum necessary reset action to preserve data interpretation accuracy.
Solution Approach 2:
The reset behavior of the DFE buffer is made dynamic rather than static. The system adjusts the reset duration and extent based on the actual timing between write operations, enabling the buffer to be fully reset when time permits and partially reset when operations are closely spaced, thus adapting to varying productivity requirements while maintaining measurement precision.
2Measurement precision
If a full reset cycle is performed on the DFE buffer, then data interpretation accuracy is maintained, but time is lost between write operations reducing productivity
Solution Approach 1:
Instead of always performing a full reset cycle, the system performs partial resetting only when necessary based on the timing between write operations. This partial action approach maintains data interpretation accuracy while minimizing the time lost to reset operations, thereby preserving productivity.
Solution Approach 2:
The reset duration parameter is dynamically changed based on the timing conditions between write operations. When operations are closely spaced, the reset parameter is adjusted to a shorter duration, allowing the system to maintain accuracy while adapting the reset time to the actual productivity requirements.
3Productivity
If the DFE buffer is not reset between closely spaced write operations, then productivity is maintained, but data interpretation becomes inaccurate due to residual buffer contents
Solution Approach 1:
The system performs partial reset action on the DFE buffer when write operations are closely spaced. This partial resetting clears enough residual contents to maintain data interpretation accuracy while being brief enough to preserve productivity, representing the minimum necessary action to resolve the contradiction.
Solution Approach 2:
The system performs a preliminary partial reset action before the next write operation begins, anticipating the need to clear residual buffer contents. This preliminary anti-action prevents the accumulation of residual data that would otherwise corrupt subsequent data interpretation, while being timed to minimize impact on productivity.
Data Source
AI summary
Methods and devices include an input buffer configured to receive data. Decision feedback equalizer (DFE) circuitry includes a DFE configured to interpret levels of the data from the input buffer and a DFE buffer that stores previous values to control the DFE based on the previous values. Moreover, the DFE circuitry also includes reset circuitry configured to reset the DFE buffer to an initial state. Furthermore, the DFE circuitry includes suppression circuitry configured to suppress resets using the reset circuitry for an interval between write operations to the memory device.