Dummy Gate-Assisted n-MOSFET for Radiation Tolerance
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Solution Overview
Problem
Radiation exposure causes leakage current in unit MOSFETs, making them unsuitable for radioactive environments, and designing semiconductor circuits with diverse channel geometries is inefficient due to the lack of analytical solutions for the W/L ratio.
Innovation Solution
A radiation-tolerant dummy gate-assisted n-MOSFET is developed with a dummy poly gate layer, p-active layer, and p+ layer to block leakage current paths, and an effective W/L ratio model is proposed for diverse channel geometries, enabling efficient circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a unit MOSFET is exposed to radiation for a long time, then leakage current is induced and turn-off operation is blocked, but the device cannot operate in radioactive environments
Solution Approach 1:
The MOSFET structure is segmented into multiple functional regions including a first dummy gate region, a second dummy gate region, and a channel region. These segments are spatially separated and independently configured to perform specific radiation mitigation functions. The first dummy gate blocks leakage current paths while the second dummy gate prevents hole trapping, collectively enhancing radiation tolerance without compromising device operation.
Solution Approach 2:
Dummy gate regions are introduced as intermediary structures between the source/drain regions and the channel. These intermediary dummy gates do not directly control the channel but serve as protective barriers that intercept radiation-induced carriers and prevent them from reaching critical regions, thereby blocking leakage current paths and maintaining device functionality in radioactive environments.
2Measurement precision
If three-dimensional simulation is performed for each unit semiconductor device with specific geometry, then accurate electrical characteristics can be obtained, but it requires a lot of time and effort
Solution Approach 1:
The invention introduces a scaling parameter approach where electrical characteristics are expressed as functions of geometric parameters (width W, length L, and dummy gate dimensions). By establishing analytical relationships between these parameters and device characteristics, the model allows rapid calculation for any geometry without requiring repeated three-dimensional simulations, thus maintaining accuracy while dramatically reducing computation time.
Solution Approach 2:
Instead of performing original three-dimensional simulations for each new device geometry, the invention creates a reusable analytical model that copies and adapts proven design principles and parameter relationships. This analytical copy can be rapidly instantiated for different geometries by simply adjusting dimensional parameters, eliminating the need to recreate full simulations for each design variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows MOSFETs to operate effectively in radioactive environments by blocking radiation-induced leakage currents and facilitates rapid modeling of electrical characteristics, enhancing semiconductor design efficiency.
Implementation Method 1
a dummy poly gate layer to block leakage current paths by use of a phenomenon that hole trapping is not generated when the thickness of the gate oxide becomes less than or equal to 10 nm
Implementation Method 2
a p-active layer and a p+ layer to block generation of leakage current by raising a threshold voltage so as to suppress channel inversion caused by trapped holes
Data Source
AI summary
The DGA n-MOSFET layout of the present invention can properly operate in a radioactive environment by blocking leakage current paths that may be created by radiation. Hence, the DGA n-MOSFET layout can be applied to design of electronic components operable in radioactive environments, such as outer space, planetary exploration, and in nuclear reactors in nuclear power plants. In addition, semiconductor design efficiency can be increased by enabling rapid modeling of electrical characteristics of a semiconductor device such as a DGA MOSFET when the channel region geometry is diversified according to design of the semiconductor device.