Diagonal Conduction Path in Bipolar Transistor Base Region
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Solution Overview
Problem
Conventional semiconductor fabrication processes for power and low voltage FET devices are not conducive to efficiently integrating bipolar transistor devices, as they require customized and additional steps that complicate the integration of bipolar devices with FET devices.
Innovation Solution
The fabrication of bipolar transistor devices with a narrowed base region and diagonally oriented conduction path is achieved through dopant ion channeling effects, where the base region is self-aligned with the trench edge, allowing for separate definition of the collector region and avoiding additional fabrication steps, utilizing existing FET device process flows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional fabrication processes for power and low voltage FET devices are used, then existing FET device functionality is maintained, but integration of bipolar transistor devices requires customized and additional fabrication steps
Solution Approach 1:
The patent makes the FET fabrication process universally applicable to both FET and bipolar transistor devices. The same process steps that create FET source/drain regions also define bipolar collector regions, and the same isolation trenches that separate FETs also define bipolar base regions. This multi-functionality eliminates the need for separate customized process steps for bipolar device integration.
Solution Approach 2:
The patent merges the fabrication processes for FET and bipolar transistor devices into a single unified process flow. The dopant implantation steps, isolation trench formation, and region definition steps are combined such that one process sequence simultaneously creates both FET and bipolar transistor structures, reducing overall process complexity.
2Reliability
If additional customized fabrication steps are added to integrate bipolar transistor devices, then bipolar device functionality is achieved, but the fabrication process flow becomes more complex and less optimized
Solution Approach 1:
The fabrication process is designed to be universally applicable, where standard FET process steps simultaneously create bipolar transistor structures. The dopant implantation, isolation trench formation, and thermal processing steps serve dual purposes, ensuring reliable bipolar device performance without requiring specialized additional manufacturing steps.
3Productivity
If separate definition of collector region is implemented through self-aligned base region, then additional fabrication steps are avoided, but precise alignment with trench edge is required
Solution Approach 1:
The base region definition process is self-aligned to the isolation trench edge, using the trench structure itself as the alignment reference. The dopant implantation for the base region is automatically positioned relative to the trench, eliminating the need for separate alignment steps and external alignment marks, thereby improving fabrication efficiency while maintaining precise positioning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the integration of bipolar transistor devices with improved breakdown voltage and current gain without adding process steps to existing FET device fabrication, optimizing high-side capability and reducing resistance.
Implementation Method 1
The variable depth contour may establish or define a diagonal conduction path across a narrowed section of the base region... The dopant ion distribution under the dielectric structure is therefore shallower than the distribution under the active areas
Data Source
AI summary
A method of fabricating a bipolar transistor including emitter and base regions having first and second conductivity types, respectively, includes forming an isolation region at a surface of a semiconductor substrate, the isolation region having an edge that defines a boundary of an active area of the emitter region, and implanting dopant of the second conductivity type through a mask opening to form the base region in the semiconductor substrate. The mask opening spans the edge of the isolation region such that an extent to which the dopant passes through the isolation region varies laterally to establish a variable depth contour of the base region.


