Diagonal FinFET SRAM Layout for Variability Control

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Solution Overview

Problem

Conventional finFET designs with orthogonal layouts face limitations in variability, particularly in SRAM cell manufacturing as transistors shrink, leading to challenges in achieving optimal performance and reducing power consumption.

Innovation Solution

A novel design layout where silicon fins are diagonally skewed relative to the gates, allowing for increased effective channel length and width, enabling longer gate lengths and improved variability, suitable for high-density SRAM cells in advanced technology nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If orthogonal layout is used for finFET SRAM cell, then manufacturing process is simple, but variability in effective channel width and length increases

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidlayout variability
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by rotating the fin structure relative to the gate at a specific angle (e.g., 30 degrees) instead of using the conventional orthogonal (90-degree) alignment. This asymmetric orientation allows the effective channel width (Weff) and length (Leff) to be decoupled from the strict geometric constraints of orthogonal layouts, providing better control over variability while maintaining manufacturing feasibility through standard photolithography processes.

Inventive Principle:
Principle #4Asymmetry

2Quantity of substance

If transistor size is reduced to increase density, then power consumption decreases, but variability in effective channel dimensions increases

Engineering Contradiction:
Improvetransistor densityVSAvoideffective channel width and length control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent changes the geometric parameters of the fin structure by introducing a rotation angle parameter (θ) between the fin and gate. By optimizing this angle parameter, the effective channel dimensions (Weff and Leff) can be independently tuned even as the overall transistor size is reduced for higher density. This parameter adjustment allows maintaining precise control over channel dimensions while scaling down transistor footprint for reduced power consumption and increased density.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If gate length is increased to improve variability control, then short channel effects are reduced, but device area increases

Engineering Contradiction:
Improveshort channel effect controlVSAvoidSRAM cell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent utilizes dimensional transformation by rotating the fin structure at an angle relative to the gate, which effectively changes the projection geometry. This angular transformation allows the effective channel length to be extended in one dimensional projection while maintaining a compact overall device footprint in the planar area. The rotated fin configuration enables longer Leff for better SCE control without proportionally increasing the SRAM cell area, as the extended channel length is achieved through angular orientation rather than linear extension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10504906B2FinFET SRAM layout and method of making the same
Publication Date: 2019.12.10 GLOBALFOUNDRIES US INC
  • US10504906B2 patent drawing
  • US10504906B2 patent drawing
  • US10504906B2 patent drawing

AI summary

A method of forming a finFET SRAM and related device, are provided. Embodiments include forming a plurality of silicon fins in a substrate; and forming a gate over each of the fins, wherein all of the fins are diagonally skewed in a single direction relative to the gates, and all of the gates extend in a single direction relative to the respective fins.