Semiconductor Die Package Terminals With Low-Temperature Copper Plating

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Solution Overview

Problem

The existing semiconductor die packaging techniques face challenges with thermal deformation and warpage during the formation of conductive terminals, particularly when using high-temperature deposition methods, which can lead to damage and reduced yield due to the presence of numerous metallization layers.

Innovation Solution

The use of low-temperature deposition techniques, such as electroplating with copper, to form conductive terminals at temperatures below 150 degrees Celsius or near room temperature, reducing thermal stress and deformation in semiconductor die packages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-temperature deposition methods are used to form conductive terminals, then the conductive terminals can be formed effectively, but thermal deformation and warpage occur leading to damage and reduced yield

Engineering Contradiction:
ImproveyieldVSAvoidthermal deformation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the temperature parameter from high-temperature deposition to low-temperature deposition (below 150°C or near room temperature), which eliminates thermal deformation and warpage while still enabling effective formation of conductive terminals through electroplating processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces thermal deposition mechanisms with electrochemical electroplating mechanisms, substituting heat-driven material deposition with electricity-driven material deposition, thereby avoiding thermal stress and deformation entirely

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Object-affected harmful factors

If low-temperature deposition techniques are used to form conductive terminals, then thermal deformation and warpage are minimized, but the process temperature must be controlled below 150 degrees Celsius or near room temperature

Engineering Contradiction:
Improvethermal stressVSAvoiddeposition temperature
Core Design Contradiction:
Object-affected harmful factorsVSTemperature

Solution Approach 1:

The patent explicitly changes the temperature parameter to below 150°C or near room temperature for the electroplating process, which reduces thermal stress while maintaining effective conductive terminal formation through controlled electrochemical deposition

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes thermal deformation and warpage, thereby increasing the reliability and yield of semiconductor die packages by allowing for the formation of conductive terminals without causing damage to the dies, enhancing their performance.

Implementation Method 1

The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS20240153895A1Semiconductor die packages and methods of formation
Publication Date: 2024.05.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240153895A1 patent drawing
  • US20240153895A1 patent drawing
  • US20240153895A1 patent drawing

AI summary

Semiconductor dies of a semiconductor die package are directly bonded, and a top metal region may be formed over the semiconductor dies. A plurality of conductive terminals may be formed over the top metal region. The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal. In this way, the conductive terminals of the semiconductor die packages described herein may be formed at a relatively low temperature. This reduces the likelihood of thermal deformation of semiconductor dies in the semiconductor die packages. The reduced thermal deformation reduces the likelihood of warpage, breakage, and/or other types of damage to the semiconductor dies of the semiconductor die packages, which may increase performance and/or increase yield of semiconductor die packages.