Lead Frame Die Pad Offset for Adhesive Overflow Containment

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Solution Overview

Problem

Existing semiconductor devices face challenges in mounting larger semiconductor chips on die pads without causing conductive adhesive overflow and compromising connection reliability and heat dissipation, due to limitations in package size and adhesive spreading.

Innovation Solution

The implementation of an offset portion on the peripheral edge of the die pad and, optionally, the suspension lead remaining portion, using a manufacturing technique like half-punching, to create a concave area for adhesive containment, allowing larger chip sizes while maintaining reliability and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the chip size of the semiconductor chip is increased to improve performance, then the ON-resistance of the power transistor decreases, but the package size must be increased which is constrained by standards

Engineering Contradiction:

ImproveperformanceVSAvoidpackage size

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The die pad is designed with a non-uniform structure: a first region with a higher upper surface for mounting the semiconductor chip, and a second region with a lower upper surface for mounting external components. This local differentiation allows the chip to be mounted on a larger effective area without increasing the overall package size, as the external components are mounted on the lower region that does not protrude.

Inventive Principle:

Principle #3Local quality

2Reliability

If a larger semiconductor chip is mounted on the die pad, then better performance is achieved, but conductive adhesive material overflows from the die pad

Engineering Contradiction:

ImproveperformanceVSAvoidadhesive containment

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The offset portion is formed on the die pad before mounting the semiconductor chip. This preliminary structural preparation creates a physical barrier that prevents conductive adhesive material from overflowing during the chip mounting process, allowing larger chips to be mounted without adhesive contamination.

Inventive Principle:

Principle #10Preliminary action

3Area of moving object

If the chip size is increased, then more chip area is available, but the conductive adhesive material spreads beyond the die pad edges

Engineering Contradiction:

Improvechip areaVSAvoidadhesive overflow

Core Design Contradiction:

Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The offset portion, which initially appears as an unused area on the die pad, is transformed into a beneficial feature by using it as an adhesive containment barrier. The lower second region acts as a physical stop that converts the potential harm of adhesive overflow into a beneficial containment mechanism, allowing larger chip areas to be mounted safely.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS12557667B2Semiconductor device with lead frame having an offset portion on a die pad

Publication Date: 2026.02.17 RENESAS ELECTRONICS CORP

AI summary

A package construction includes: a die pad, and a suspension lead remaining portion connected to the die pad. Here, an offset portion is provided from a peripheral edge portion of the die pad to the suspension lead remaining portion. Also, the suspension lead remaining portion has: a first end portion connected to the die pad, and a second end portion opposite the first end portion. Further, the second end portion of the suspension lead remaining portion is exposed from the side surface of the sealing body at a position spaced apart from each of the upper surface and the lower surface.