Semiconductor Die Pad Plated Layer for Solder Joint Stability
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Solution Overview
Problem
The reliability of semiconductor devices is compromised due to instability in solder joints between semiconductor chips and metal plates in DC-DC converters, leading to potential short circuits and reduced joint strength, especially when using copper or copper alloys which have poor solder wettability.
Innovation Solution
A semiconductor device configuration where high-side and low-side MOSFETs, along with driver circuits, are integrated in a single package with separate chip mounting parts and plated layers on die pads to improve solder wettability, reducing solder spreading and enhancing joint stability by using a metal plate to connect the source electrode of the high-side MOSFET to the die pad, and a plated layer on the low-side chip mounting part to connect the low-side MOSFET and metal plate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If copper or copper alloy is used for die pads to improve thermal conductivity and reduce cost, then thermal conductivity and cost are improved, but solder wettability deteriorates leading to unstable solder joints
Solution Approach 1:
A plated layer (intermediate layer) is formed on the die pad surface between the copper base material and the solder joint. This plated layer acts as a mediator that provides good solder wettability while allowing the copper die pad to maintain its high thermal conductivity. The plated layer prevents direct contact between solder and copper, eliminating the wettability problem while preserving the thermal advantages of copper.
Solution Approach 2:
The die pad structure is made composite by combining copper (for thermal conductivity) with a plated layer (for solder wettability). This composite structure allows each material to contribute its advantageous properties: copper provides excellent thermal conduction and cost-effectiveness, while the plated layer provides good solder bonding characteristics, resolving the contradiction between thermal performance and joint reliability.
2Temperature
If solder is used to connect semiconductor chips and metal plates, then electrical conductivity and thermal conductivity are improved, but solder spreading occurs reducing joint strength and reliability
Solution Approach 1:
A plated layer is formed in advance on the die pad surface before soldering takes place. This preliminary action creates a controlled surface that limits solder spreading during the soldering process. The plated layer acts as a barrier that contains the solder within the desired connection area, preventing excessive spreading that would weaken the joint and compromise reliability.
3Volume of moving object
If high-side and low-side MOSFETs with driver circuits are integrated in a single package, then device size is reduced, but electrical connection complexity increases
Solution Approach 1:
Multiple functional components (high-side MOSFET, low-side MOSFET, and driver circuits) are merged into a single integrated package. This consolidation reduces the overall device size and simplifies the system architecture by eliminating the need for separate packages and external connections between components, thereby reducing electrical connection complexity despite the increased internal integration.
Solution Approach 2:
Metal plates are introduced as intermediary connection elements between the semiconductor chips and die pads. These metal plates simplify the electrical connections by providing direct, low-inductance pathways between components, reducing the complexity of electrical interconnections while maintaining the compact integrated package structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the reliability and joint strength of semiconductor devices by stabilizing solder joints and preventing short circuits, while maintaining a compact size and high-frequency performance.
Implementation Method 1
When connecting by soldering a semiconductor chip or metal plate to a die pad, it is desirable to form a plated layer in advance to the die pad
Implementation Method 2
copper (Cu) or copper (Cu) alloy has poor solder wettability, and therefore, it is desirable to form a plated layer in advance in order to improve solder wettability
Implementation Method 3
it is possible to reduce the loss of conduction and improve the electrical characteristics of the semiconductor device compared to a case where a bonding wire is used
Implementation Method 4
a low-side chip connecting plated layer formed in a region where the low-side semiconductor chip is mounted and a metal plate connecting plated layer formed in a region where the metal plate is joined are provided
Data Source
AI summary
The reliability of a semiconductor device is improved. A package of a semiconductor device internally includes a first semiconductor chip and a second semiconductor chip in which power MOS•FETs are formed and a third semiconductor chip in which a control circuit controlling the first and second semiconductor chips is formed. The first to third semiconductor chips are mounted on die pads respectively. Source electrode bonding pads of the first semiconductor chip on a high side are electrically connected with a first die pad of the die pads via a metal plate. On a top surface of the die pad 7D2, a plated layer formed in a region where the second semiconductor chip is mounted, and another plated layer formed in a region where the metal plate is joined are provided and the plated layers are separated each other with a region where no plated layer is formed in between.