Die Rearrangement Package Using B-Stage Material

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Solution Overview

Problem

The challenge in semiconductor packaging is the curling of molding structures due to stress, which complicates the sequential sawing process, especially with thinner dies, and the increased signal coupling and noise from reduced bonding pad pitches in wafer-level packaging.

Innovation Solution

A die rearrangement package method using a B-stage material to encapsulate dies, with alignment marks on the reverse side for precise placement, and a polymer material with slits to manage stress and curl, allowing for wider pitches and improved reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If wafer is thinned and dies are rearranged on substrate with molding process, then packaging density is improved, but curling occurs due to stress from thin molding structure

Engineering Contradiction:
Improvepackaging densityVSAvoidcurling of molding structure
Core Design Contradiction:
Volume of moving objectVSShape

Solution Approach 1:

The patent applies preliminary action by forming a stress compensation layer on the substrate before arranging the thinned dies. This layer is prepared in advance to counteract the stress that will later cause curling, preventing the deformation issue before it occurs during the molding process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical-chemical parameters of the substrate by introducing a stress compensation layer with specific mechanical properties. This layer modifies the stress distribution parameters in the overall structure, balancing the internal stresses from thinned dies and preventing curling while maintaining packaging density

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If bonding pad pitches are reduced to increase I/O density, then packaging compactness is improved, but signal coupling and noise increase

Engineering Contradiction:
Improvebonding pad area densityVSAvoidsignal coupling and noise
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating redistribution layers with different metal trace patterns in different regions. The trace width, spacing, and routing are locally optimized based on the specific signal requirements, allowing dense pad placement while maintaining signal integrity through region-specific trace design

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces redistribution layers as intermediary structures between the bonding pads and external connections. These intermediate metal trace layers provide controlled impedance pathways, shielding, and routing that reduce signal coupling and noise while enabling higher pad density

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If 12-inch wafer dies are packaged using 8-inch wafer equipment, then manufacturing cost is reduced, but alignment precision must be maintained

Engineering Contradiction:
Improvepackaging costVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies copying by creating alignment mark patterns on the 12-inch wafer that correspond to the 8-inch wafer equipment's alignment system. Reference marks and positioning features are replicated in formats that the existing 8-inch equipment can accurately detect and use for precise die placement

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent achieves universality by designing a substrate and alignment mark system that can accommodate dies from 12-inch wafers while being processed on 8-inch wafer equipment. The standardized substrate format and alignment protocols enable the existing equipment to handle larger wafer-derived dies without sacrificing precision

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces packaging costs by utilizing existing 8-inch wafer equipment for 12-inch wafer dies, enhances yield and reliability by minimizing curl and stress, and addresses signal coupling and noise issues through precise alignment and redistribution layer processes.

Implementation Method 1

performing a baking process to cure the B-stage material to form a curied package body

Methodology Applied
Scientific EffectCuring: Heat Treatment

Data Source

PatentUS7915690B2Die rearrangement package structure using layout process to form a compliant configuration
Publication Date: 2011.03.29 CHIPMOS TECH INC
  • US7915690B2 patent drawing
  • US7915690B2 patent drawing
  • US7915690B2 patent drawing

AI summary

A die rearrangement package structure is provided, which includes a die that having an active surface and a bottom surface, and a plurality of pads is disposed on the active surface; a package body is provided to cover a die and the active surface being exposed; a polymer material with at least one slit is provided to cover the active surface and the pads is exposed from said slits; one ends of a plurality of metal traces is electrically connected to each pads; a protective layer is provided to cover the active surface of the dies and each metal traces, and the other ends of the metal traces being exposed; a plurality of connecting elements is electrically connected other ends of the metal traces, the characterized in that: the package body is a B-stage material.