Die Stacked Image Sensors With Hybrid And Fusion Bonding
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Solution Overview
Problem
Conventional pixel level stacking of image sensors is limited in size reduction due to the need for larger second dies to accommodate signal processing circuitry, which prevents full realization of sensor size reduction potential.
Innovation Solution
The implementation of a die stacked image sensor structure involving a first die with detectors, a second die with transistors and passive electrical components, and a third die with analog and logic circuitry, bonded using hybrid and fusion bonding techniques, with through oxide vias and microlenses to enable efficient signal routing and interconnects within the footprint of the pixel array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pixel level stacking is used to reduce sensor size, then sensor area is reduced, but the second die must be larger to accommodate signal processing circuitry which limits size reduction
Solution Approach 1:
The patent divides the image sensor into three separate dies: first die for photodetectors, second die for transistors and passive components, and third die for analog and logic circuitry. This segmentation allows each die to be optimized for its specific function and enables high-density interconnects within the pixel array footprint, resolving the contradiction by preventing any single die from needing to be oversized for multiple functions.
Solution Approach 2:
The patent transitions from planar integration to three-dimensional stacking, arranging detector elements, transistors, and circuitry across multiple vertical layers. This dimensional change allows all components to coexist within the footprint of the pixel array, achieving size reduction while accommodating complex signal processing circuitry through vertical integration rather than horizontal expansion.
2Area of stationary object
If all components are integrated within the pixel array footprint, then sensor size is reduced, but manufacturing complexity increases due to hybrid and fusion bonding requirements
Solution Approach 1:
The manufacturing process is segmented into distinct stages: hybrid bonding of the first and second dies, thinning of the second die, and fusion bonding of the second and third dies. This segmentation of the manufacturing process allows each bonding operation to be optimized independently, managing the overall complexity despite the multi-step nature of the process.
Solution Approach 2:
The second die serves as an intermediary layer between the first die (photodetectors) and the third die (analog and logic circuitry). This intermediate die facilitates the complex bonding process by providing a transition layer that can be thinned and bonded using different techniques, simplifying the overall manufacturing sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for reduced image sensor size by integrating all necessary components within the pixel array footprint, achieving high-density interconnects and efficient signal processing, thereby enhancing the potential for sensor size reduction.
Implementation Method 1
a first die including a plurality of detectors adapted to convert photons to electrons
Implementation Method 2
The second die may be bonded to the third die with an oxide/oxide fusion bond
Implementation Method 3
The first die may be hybrid bonded to the second die
Data Source
AI summary
Implementations of image sensors may include: a first die including a plurality of detectors adapted to convert photons to electrons; a second die including a plurality of transistors, passive electrical components, or both transistors and passive electrical components; a third die including analog circuitry, logic circuitry, or analog and logic circuitry. The first die may be hybrid bonded to the second die, and the second die may be fusion bonded to the third die. The plurality of transistors, passive electrical components, or transistors and passive electrical components of the second die may be adapted to enable operation of the plurality of detectors of the first die. The analog circuitry, logic circuitry, and analog circuitry and logical circuitry may be adapted to perform signal routing.