Die-Wrapped Flexible Substrate Packaging for Low-Stress Routing
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Solution Overview
Problem
Conventional wafer chip scale packages (WCSPs) face issues such as mechanical and optical sensitivities due to exposed semiconductor dies, excessive stress from passivation materials, limited material and size choices, high manufacturing costs, and complexity in laminate-based embedding processes, which restrict the creation of miniature semiconductor device packages with complex routing and limited pin size options.
Innovation Solution
A die-wrapped packaged device is introduced, where a semiconductor or optical MEMS die is enveloped by a flexible substrate on at least three sides, providing encapsulation and exposed lead terminals, eliminating the need for additional molding and allowing for reduced manufacturing steps and increased flexibility in pin configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional passivation materials such as polyamide layers are used, then the die is protected, but excessive stress is applied to the die due to high temperature cure and large volume of volatiles
Solution Approach 1:
The patent changes the material parameters by using low-stress encapsulants with different thermal and mechanical properties compared to conventional polyamide layers. The encapsulant is selected to have lower volatility and reduced thermal expansion, thereby protecting the die from excessive stress during curing and operation.
Solution Approach 2:
The patent employs composite material structures by combining the semiconductor die with a specially formulated encapsulant material that integrates protective functions while minimizing stress. The composite structure allows optimization of each layer's properties to achieve overall reliability without die stress.
2Volume of moving object
If dielectric layers are made thin to reduce package size, then the package becomes more compact, but the layers become permeable to moisture and light
Solution Approach 1:
The patent uses composite encapsulant structures that combine multiple functional layers or materials with complementary properties. The encapsulant material is specifically selected to provide both mechanical protection and environmental barrier functions, achieving moisture and light blocking in a thin profile suitable for compact packaging.
Solution Approach 2:
The patent employs thin-film encapsulant structures that provide effective environmental protection despite minimal thickness. The encapsulant is designed as a continuous protective layer that maintains barrier integrity while enabling compact package dimensions.
3Adaptability or versatility
If laminate-based embedding and build-up processes are used, then complex routing can be achieved, but the manufacturing becomes expensive and complex
Solution Approach 1:
The patent segments the packaging process into discrete, manageable steps that avoid complex laminate embedding. The underfill material is applied in a simplified manner that achieves necessary routing functionality without requiring multi-layer laminate construction, thereby reducing manufacturing complexity while maintaining adaptability for various pin configurations.
4Ease of manufacture
If WCSP is built on top of the semiconductor die, then integration is achieved, but choices of materials and sizes are limited
Solution Approach 1:
The patent inverts the conventional WCSP construction approach by placing the underfill material and encapsulant around and beneath the die rather than building exclusively on top. This inverted architecture enables greater freedom in material selection and size configuration, allowing LGA and QFN footprint options while maintaining integration benefits.
Data Source
AI summary
A die-wrapped packaged device includes at least one flexible substrate having a top side and a bottom side that has lead terminals, where the top side has outer positioned die bonding features coupled by traces to through-vias that couple through a thickness of the flexible substrate to the lead terminals. At least one die includes a substrate having a back side and a topside semiconductor surface including circuitry thereon having nodes coupled to bond pads. One of the sides of the die is mounted on the top side of the flexible circuit, and the flexible substrate has a sufficient length relative to the die so that the flexible substrate wraps to extend over at least two sidewalls of the die onto the top side of the flexible substrate so that the die bonding features contact the bond pads.


