Dielectric Barrier Etching via Hardmask Removal Sequence
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Solution Overview
Problem
In semiconductor manufacturing, existing methods fail to effectively etch dielectric barrier layers without damaging underlying conductive structures, leading to early exposure and contamination, which affects the electrical performance and integration of dual damascene structures.
Innovation Solution
A method involving a 'Barrier Open Last' process, where a hardmask layer is removed before etching the dielectric barrier layer, using a plasma etching process with an ammonium and nitrogen trifluoride gas mixture, and subsequent plasma annealing to incrementally and selectively remove the dielectric barrier layer, minimizing exposure and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the dielectric barrier layer is etched before removing the hardmask layer, then the etching process can be completed, but the underlying conductive layer is exposed to air and becomes contaminated with native oxides and contaminants
Solution Approach 1:
The patent applies preliminary action by removing the hardmask layer before etching the dielectric barrier layer. This reverses the conventional sequence and ensures that the conductive layer remains protected by the hardmask during the etching process, preventing exposure to air and contamination with native oxides and contaminants.
2Ease of operation
If the conductive layer is exposed to air for extended periods, then subsequent processing steps can be performed, but the electrical performance deteriorates due to poor adhesion and high contact resistance
Solution Approach 1:
The patent performs the hardmask removal as a preliminary action before dielectric barrier layer etching, which minimizes the exposure time of the conductive layer to air. This ensures that the conductive layer surface remains clean and free from native oxide accumulation, maintaining good adhesion and electrical performance for subsequent metallization processes.
3Productivity
If conventional etching methods are used on dielectric barrier layers, then etching can be performed, but the underlying conductive structures are damaged
Solution Approach 1:
The patent removes the hardmask layer before etching the dielectric barrier layer, which eliminates the need for aggressive etching conditions that would damage the conductive layer. This sequence allows for controlled, selective etching that preserves the integrity of the underlying conductive structures while still achieving complete dielectric barrier layer removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures high etching selectivity and quality control, reducing oxide and contamination generation, thereby enhancing the electrical performance and manufacturing flexibility of semiconductor devices.
Implementation Method 1
subsequently etching the dielectric barrier layer exposed by the dielectric bulk insulating layer
Implementation Method 2
using a plasma etching process with an ammonium and nitrogen trifluoride gas mixture
Implementation Method 3
subsequent plasma annealing to incrementally and selectively remove the dielectric barrier layer
Implementation Method 4
subsequent plasma annealing to incrementally and selectively remove the dielectric barrier layer
Data Source
AI summary
Methods for eliminating early exposure of a conductive layer in a dual damascene structure and for etching a dielectric barrier layer in the dual damascene structure are provided. In one embodiment, a method for etching a dielectric barrier layer disposed on a substrate includes patterning a substrate having a dielectric bulk insulating layer disposed on a dielectric barrier layer using a hardmask layer disposed on the dielectric bulk insulating layer as an etching mask, exposing a portion of the dielectric barrier layer after removing the dielectric bulk insulating layer uncovered by the dielectric bulk insulating layer, removing the hardmask layer from the substrate, and subsequently etching the dielectric barrier layer exposed by the dielectric bulk insulating layer.