Dielectric Fin Trimming for MBC Transistor Spacer Control
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Solution Overview
Problem
In the fabrication of multi-bridge-channel (MBC) transistors, the residual sacrificial cladding layer near the bottom of dielectric fins can prevent the inner spacer feature from reaching the desired thickness, leading to shorts between the gate structure and the source/drain feature.
Innovation Solution
The method involves trimming the dielectric fins after the formation of dummy gate stacks but before the deposition of a gate spacer layer. This selective trimming reduces the width of the helmet layer, improving the line-of-sight for subsequent etching processes and reducing the amount of leftover sacrificial cladding layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the sacrificial cladding layer is not sufficiently removed during formation of source/drain openings, then the manufacturing process is simpler, but the inner spacer layer cannot reach sufficient thickness to prevent shorts between gate structure and source/drain feature
Solution Approach 1:
The patent applies preliminary action by trimming the dielectric fin before forming the inner spacer layer. This preliminary trimming removes excess sacrificial cladding material in advance, ensuring that the subsequent inner spacer layer can be deposited with sufficient thickness to prevent shorts between the gate structure and source/drain features.
Solution Approach 2:
The patent segments the dielectric fin formation process into multiple stages: initial deposition of sacrificial cladding layer, selective trimming to remove excess material, and then inner spacer layer deposition. This segmentation allows each step to be optimized independently, ensuring proper thickness control without requiring complete removal of the sacrificial layer in one complex step.
2Manufacturing precision
If conventional dielectric fins are used without trimming, then the manufacturing process is simpler, but residual sacrificial cladding layer prevents inner spacer feature from reaching desired thickness
Solution Approach 1:
The trimming step is performed as a preliminary action before inner spacer layer deposition. This preliminary trimming ensures that the sacrificial cladding layer does not interfere with achieving the desired inner spacer thickness, while keeping the overall process relatively simple by using standard etching techniques.
Solution Approach 2:
The patent changes the physical parameters of the dielectric fin by selectively removing material through controlled etching. This parameter change (reducing the width of the dielectric fin) enables the inner spacer layer to achieve the required thickness without compromising the ease of manufacture, as the trimming uses conventional semiconductor processing techniques.
3Reliability
If the dielectric fin width is reduced by trimming, then the line-of-sight for etching is improved and residual cladding is reduced, but additional process steps are required
Solution Approach 1:
The trimming step is implemented as a preliminary action that prevents future defects. By removing excess sacrificial cladding material before inner spacer layer formation, the process ensures reliable device operation. The additional step is justified by the prevention of shorts and the improvement of etching line-of-sight for subsequent steps.
Solution Approach 2:
The patent converts the potential harm of residual sacrificial cladding material into a benefit by using it as a guide for selective trimming. The presence of the cladding layer initially allows for precise trimming control, and its selective removal ultimately improves the etching line-of-sight and reduces residual material, enhancing device reliability despite the additional process step.
Data Source
AI summary
A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.


