FinFET Patterning Using Dielectric Fins to Equalize Fin Etch Loading

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Solution Overview

Problem

The scaling down of FinFET technologies to smaller feature sizes poses challenges in fin patterning due to decreasing process margins, leading to issues like fin etch iso/dense loading, which affects fin width uniformity and performance.

Innovation Solution

The introduction of dummy fins adjacent to isolated active fins reduces left/right loading, achieving fin width uniformity by maintaining density similar to that of dense active fins, thereby improving fin etch uniformity and reducing short channel effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If FinFET technologies are scaled down to smaller feature sizes, then production efficiency increases and costs decrease, but fin etch uniformity deteriorates due to iso/dense loading effects

Engineering Contradiction:

Improveproduction efficiencyVSAvoidfin etch uniformity

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The method introduces dummy fins adjacent to isolated active fins before the etching process. This preliminary structural modification ensures that during etching, the isolated fins experience similar loading conditions as dense fins, thereby pre-compensating for the etch uniformity issue and achieving consistent fin widths across different fin types

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies a local modification approach by selectively adding dummy fins only adjacent to isolated active fins, while leaving dense fin regions unchanged. This localized quality adjustment addresses the specific etch loading problem in isolated fin regions without affecting the overall fin structure or requiring global process changes

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If dummy fins are introduced adjacent to isolated active fins, then fin width uniformity improves, but device structure complexity increases

Engineering Contradiction:

Improvefin width uniformityVSAvoidfin structure complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The method modifies the physical presence (parameter) of fin structures by adding dummy fins with specific dimensions and spacing. This parameter change transforms the local density environment of isolated fins, enabling uniform etch loading conditions and achieving consistent fin widths without fundamentally altering the device architecture or requiring complex multi-step processes

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS11742415B2Fin-like field effect transistor patterning methods for achieving fin width uniformity

Publication Date: 2023.08.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

FinFET patterning methods are disclosed for achieving fin width uniformity. An exemplary method includes forming a mandrel layer over a substrate. A first cut removes a portion of the mandrel layer, leaving a mandrel feature disposed directly adjacent to a dummy mandrel feature. The substrate is etched using the mandrel feature and the dummy mandrel feature as an etch mask, forming a dummy fin feature and an active fin feature separated by a first spacing along a first direction. A second cut removes a portion of the dummy fin feature and a portion of the active fin feature, forming dummy fins separated by a second spacing and active fins separated by the second spacing. The second spacing is along a second direction substantially perpendicular to the first direction. A third cut removes the dummy fins, forming fin openings, which are filled with a dielectric material to form dielectric fins.