Dielectric Isolation Semiconductor Device With Porous Oxide Film
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Solution Overview
Problem
Dielectric isolation type semiconductor devices face challenges in maintaining high dielectric strength while ensuring reliable wire bonding, as increasing the thickness of the dielectric layer reduces the RESURF effect and can lead to avalanche breakdown, and traditional lead-out wiring methods compromise dielectric strength.
Innovation Solution
A dielectric isolation type semiconductor device with a support substrate featuring an embedded dielectric layer and a semiconductor substrate of low impurity concentration, where a porous oxide film and a silicone ladder polymer layer are strategically formed to alleviate electric field concentration, and wire bonding is enhanced using ultrasonic wire bonding on a single-crystal silicon substrate with high mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of the dielectric layer is increased to maintain high dielectric strength, then the dielectric strength is improved, but the RESURF effect is reduced and avalanche breakdown may occur
Solution Approach 1:
The patent introduces a porous oxide film layer with specific local properties (porosity, dielectric constant) at the interface region between the dielectric layer and support substrate. This localized structural modification allows the system to maintain adequate dielectric strength while preserving the RESURF effect by controlling electric field distribution in the critical interface region without requiring uniform increase in overall dielectric layer thickness.
2Ease of manufacture
If traditional lead-out wiring methods are used, then wiring is simplified, but dielectric strength is compromised
Solution Approach 1:
The patent introduces an intermediary porous oxide film layer that serves as a transition zone between the dielectric layer and support substrate. This intermediary structure provides a pathway for wire bonding while maintaining dielectric strength by distributing electric field stress and providing mechanical support, thus mediating between the requirements of wiring accessibility and dielectric performance.
3Ease of operation
If wire bonding is performed on porous oxide film, then wiring is enabled, but mechanical defects like cracks may occur
Solution Approach 1:
The patent creates a composite structure consisting of the porous oxide film layer integrated with the dielectric layer and support substrate. This composite material system combines the wire-bonding accessibility of porous structures with the mechanical strength of the surrounding dense materials, allowing wire bonding to be performed while preventing crack propagation through the integrated composite architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution maintains high dielectric strength and enables reliable wire bonding with large dielectric strength wiring, preventing mechanical defects like cracks and ensuring efficient voltage distribution, thereby improving the semiconductor device's performance and reliability.
Implementation Method 1
a first dielectric portion that is arranged adjacent to the embedded dielectric layer in a manner so as to surround a region of the support substrate that is superposed on the first semiconductor region
Implementation Method 2
under the condition that avalanche breakdowns due to the concentration of electric field at the p-n junction between the n− type semiconductor layer and the p+ type semiconductor region and the concentration of electric field at the interface between the n− type semiconductor layer and the n+ type semiconductor region do not occur
Implementation Method 3
a dielectric layer and a rear surface electrode are arranged on an upper surface and a lower surface, respectively, of a support substrate, and a semiconductor substrate is provided on an upper surface of the dielectric layer so that the semiconductor substrate and the support substrate are dielectrically isolated from each other by means of the dielectric layer
Implementation Method 4
wire bonding is enhanced using ultrasonic wire bonding on a single-crystal silicon substrate with high mechanical strength
Data Source
AI summary
A dielectric isolation type semiconductor device includes a dielectric isolation type substrate in which a support substrate, an embedded dielectric layer, and a first conductive type semiconductor substrate of a low impurity concentration are laminated one over another. The semiconductor substrate includes a first semiconductor region of a first conductive type having a high impurity concentration, a second semiconductor region of a second conductive type having a high impurity concentration arranged so as to surround the first semiconductor region, a first main electrode joined to a surface of the first semiconductor region, and a second main electrode joined to a surface of the second semiconductor region. A first dielectric portion is arranged adjacent the embedded dielectric layer so as to surround a region of the support substrate superposed on the first semiconductor region in a direction of lamination thereof, and a wire connected with the first main electrode.